Re: Re: CAN Mask & Filter setting at ---- software level
Dinesh Guleria <[email protected]>
| Newsgroups | gmane.comp.hardware.bus.can |
|---|---|
| Message-ID | <CAKpDV8u9324QRmKADr5+riQnBaoCUohWeAwmzkZbrUup=qdqcQ@mail.gmail.com> |
>>Well ... you are right ... the CAN controller does it wrong :) Means Got confused with your statement ....??? Do you agree with mine ? I have just checked under debugger your equation is giving result of zero for almost all ID. result = !( ( filtr ^ a_ ) | mask ); This equation only pass right ID result = !( ( filtr ^ a_ ) & mask ); This will Rx 0x001, 0x003, 0x011, 0x013, 0x021, 0x023, 0x031 and 0x033 IDs. On Thu, Dec 6, 2012 at 2:46 PM, Steinhoff <[email protected]> wrote: > Dinesh Guleria wrote: > > How you are setting class or mask bit ? > > > ?? > > > > In my case :-- > > ID_1 = 0x01; // 0000 0001 > ID_2 = 0x33; // 0011 0011 > mask = 0x32; // 0011 0010 > -------------------------------------> 0 for common bits, ------ where bits > are different put bit as 1 -- for dont care > filter = 0x01; // 0000 0001 > -------------------------------------> copy common bits to the filter & > dont care for the diffrent bits > > > ?? Well ... you are right ... the CAN controller does it wrong :) > > > > > On Wed, Dec 5, 2012 at 11:18 PM, Steinhoff <[email protected]> wrote: > >> >> BTW ... !( ( filter ^ messageID_Rx ) is equivalent to the VHDL >> operatoin "filter = messageID_Rx" >> >> --Armin >> >> >> Dinesh Guleria wrote: >> >> >> it must be: !( ( filter ^ messageID_Rx ) OR mask ); // if ^ means >> exlusive OR >> >> But where in your VHDL code you are using ---- exlusive OR(^) and not >> (!)operator ...? >> >> On Wed, Dec 5, 2012 at 3:42 PM, Steinhoff <[email protected]> wrote: >> >>> Dinesh, >>> >>> here is some VHDL code of a CAN core showing the filter process: >>> >>> -- Working in basic mode. ID match for standard format (11-bit ID). >>> match <= (((((((CONV_STD_LOGIC(id(3) = acceptance_code_0(0)) OR >>> acceptance_mask_0(0)) >>> AND (CONV_STD_LOGIC(id(4) = acceptance_code_0(1)) OR >>> acceptance_mask_0(1))) >>> AND (CONV_STD_LOGIC(id(5) = acceptance_code_0(2)) OR >>> acceptance_mask_0(2))) >>> AND (CONV_STD_LOGIC(id(6) = acceptance_code_0(3)) OR >>> acceptance_mask_0(3))) >>> AND (CONV_STD_LOGIC(id(7) = acceptance_code_0(4)) OR >>> acceptance_mask_0(4))) >>> AND (CONV_STD_LOGIC(id(8) = acceptance_code_0(5)) OR >>> acceptance_mask_0(5))) >>> AND (CONV_STD_LOGIC(id(9) = acceptance_code_0(6)) OR >>> acceptance_mask_0(6))) >>> AND (CONV_STD_LOGIC(id(10) = acceptance_code_0(7)) OR >>> acceptance_mask_0(7)) ; >>> >>> The "=" operator means equivalence ... >>> >>> --Armin >>> >>> >>> Dinesh Guleria wrote: >>> >>> Armin, >>> >>> >>Isn't it? >>> >>> The real result must be:----- >>> !( ( filter ^ messageID_Rx ) & mask ); >>> >>> Above equation is working for me very well many a time i have used it >>> .. >>> >>> //Dinesh >>> >>> On Mon, Dec 3, 2012 at 11:25 PM, Steinhoff <[email protected]>wrote: >>> >>>> >>>> Well, >>>> >>>> that what the SJA1000 specification is showing by the "aceptance >>>> schemes" with the >>>> logical gates is not correct ... there seems to be a misinterpretation >>>> of the IEC gate symbol "=" :) >>>> >>>> The real result must be: >>>> >>>> result = NOT( filter XOR id ) OR mask; >>>> >>>> Isn't it? >>>> >>>> --Armin >>>> >>>> >>>> Steinhoff wrote: >>>> >>>> >>>> Dinesh. >>>> >>>> the result should be: >>>> >>>> result = ( filter XOR id ) OR mask; >>>> >>>> Acceptance happens if all bits are set in result. >>>> >>>> Regards >>>> >>>> --Armin >>>> >>>> PS: SJA1000 spec / p. 45 >>>> >>>> Dinesh Guleria wrote: >>>> >>>> Got the concept. >>>> >>>> Now if i want DM to trigger for following types 0x01 & 0x33 :-- >>>> >>>> Type to be accepted :-- >>>> 0x01; // 0000 0001 >>>> 0x33; // 0011 0011 >>>> >>>> mask = 0xCD; // 1100 1101 -----> put 0 for >>>> diffrent bits ------ & ------ 1 for common bits >>>> filter = 0x01; // 0000 0001 ------>put 0 >>>> for dont care bits ------ & ------ SAME VALUE for common bits >>>> >>>> result = ( ( filter ^ a_ ) & mask ); >>>> if(!result) >>>> { >>>> //accept >>>> } >>>> >>>> >>>> This will Rx 0x001, 0x003, 0x011, 0x013, 0x021, 0x023, 0x031 and >>>> 0x033 IDs. >>>> >>>> Still in terms of CAN Rx workload for the processor, only 6 unwanted >>>> IDs out of a possible total 2032 CAN IDs (for 11 bit IDEs) to Rx may be of >>>> some reduced workload benefit. >>>> >>>> We can put further filtering at the next level of software to accept >>>> message what we want. >>>> >>>> BTW, weonly get 2032 and not 2048 11 bit CAN IDs because no IDs are >>>> allowed to have all 7 most significant bits set at the same time. >>>> >>>> Regards, >>>> Dinesh >>>> >>>> >>>> On Sat, Dec 1, 2012 at 9:34 PM, Dinesh Guleria <[email protected]>wrote: >>>> >>>>> Hi, >>>>> >>>>> I have enable my can controller to receive all messages & trying to >>>>> filtering messages it at software level. >>>>> I referred following link by Heikki >>>>> http://old.nabble.com/Setting-CAN-MASK---ID-registers-td14881913.html >>>>> >>>>> Suppose i want to receive only ID_1 & ID_2. >>>>> But I was not able to get the desired result ID-0x03 is still passing >>>>> the software filter >>>>> >>>>> >>>>> ID_1 = 0x01; // 0000 0001 >>>>> ID_2 = 0x33; // 0011 0011 >>>>> mask = 0x32; // 0011 0010 >>>>> filter = 0x01; // 0000 0001 >>>>> >>>>> if ---- messageID_Rx = 0x03 >>>>> >>>>> ========== CODE ====================== >>>>> >>>>> result = !( ( filter ^ messageID_Rx ) & mask ); >>>>> >>>>> if ( result ) >>>>> { >>>>> // ID accepted >>>>> } >>>>> >>>>> >>>>> ==================================== >>>>> >>>>> Can someone on list help me to correct this. Or can suggest me where >>>>> i am getting wrong ? >>>>> Any reply will be appreciable. >>>>> >>>>> Thanks & Regards, >>>>> >>>>> Dinesh >>>>> >>>> >>>> >>>> >>>> >>> >>> >> >> > >