Re: STM32: Problems running code with an offset in flash (bootloader)

Hi Uwe,

great, thank you very much. You made my day.

Commenting out the "wfi" call in the idle thread does the trick.

I'll now disable the deepsleep mode bit, so I hopefulle should be able
to use the WFI call again.

best regards,

Ole

Am 04.03.2016 um 18:34 schrieb Uwe Bonnes:
> Hello,
> 
> when the bootloader starts the application, the clock tree is set up
> fine. Using only GPIO toggle and NutMicroDelay, things work as expected. As
> soon as interrupts get involved, HSE is switched off and instead of PLL only
> HSI is used.
> 
> Watching RCC->CR and RCC->CFGR starting with main in the debugger showed no
> unexpected access.  I tracked the WiFiMCU bootloader down to setting the
> sleepdeep bit in the system control register. When entering deep sleep with
> e.g. WFI, HSE is turned off, PLL has no more input and system switches to
> HSI on wakeup/
> 
> Otherwise WiFiMCU uses the same debug port, but a different clock (26 MHz vs
> 8 MHz). With no application loaded to 0x0800c000, I can see the bootloader
> output at 115200 * 8 / 26 Baud with a Saleae Logicanalyser. For the
> application, I can change the config to use 8 MHz.
> 
> Bye
> 

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