STM32F7 RAM
Holger Mai <[email protected]> Mon, 11 Apr 2016 12:12:30 +0200 (CEST)
| Newsgroups | gmane.comp.hardware.microcontrollers.ethernut |
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| Message-ID | <2104898254.317234.0eb6c961-0c18-4050-9122-fe7931570c58.open-xchange@email.1und1.de> |
Ok, lets have a look into the STM32F7xx reference manual, chapter 2.3 Embedded SRAM. The ITCM is for instructions only, and only accessible from core. It can be used for (very fast) code, but before the code must written into by the core. ITCM is the best choice to run Code from RAM (because no waitstates, but this is only possible if the code is time critical, i.e. much iterations/loops for calculations). Therefore it can be used as a special section in the linkerscript. This meets your points "RAM functions" and "Code when running from RAM (NUTDEBUG_RAM, text section)" Stacks are tricky because you must guarant, that no local variables are written or readed with any DMAs. I think this should be avoided. On the other hand, 16kb are not so much. Next are the two Blocks SRAM1 and SRAM2. This is the same RAM type, and a separation makes only sense, if you had to to such things like double buffering for time critical data in/output. For those setups you must refer to the Bus Matrix in the ref-Manual. However, this is the Memory for an "universal" usage. Last is DTCM: "Data Tightly Coupled Memory" is connected directly to the core, and accessible over the Busmatrix, but only over a special interface in the core, and over the same bus that is used for access from core. I found no details how this is touched by some things like data caching and access prioritys. There are some tests necessary to evaluate these circumstances. Therefore i doesnt use DTCM at the moment for heap, only as section for static variables. If there a dynamic memory management for this section aside the normal malloc were possible, then it can be easy used as memory for special usage. I think that DTCM is coupled with the core about a 64bit interface (because a bold line in the Memory architecture sheet, see RefMan 2.1), but the RefManual doesnt say this explicit (for the ITCM Bus it does). An additional Feature of the DTCM is a clock source, who can enable/disable the DTCM Clock (AHB1, DTCMRAMEN). This maybe equal with an access lock, but the Refmanual says nothing about data preservation if disabled and then reenabled. This clock must be enabled by default on startup time. mit freundlichen Grüßen /Best Regards Holger Mai [email protected] GEMAC - Gesellschaft für Mikroelektronik- anwendung Chemnitz mbH Zwickauer Straße 227 D-09116 Chemnitz Tel. +49 371 3377 - 0 Fax +49 371 3377 272 UST-ID: DE140851265 HRB 6443 Chemnitz/Stadt Geschäftsführer: Dirk Hübner / Karsten Grönwoldt http://www.gemac-chemnitz.de _______________________________________________ http://lists.egnite.de/mailman/listinfo/en-nut-discussion