Searching for a basic stamp expert with C understanding, for a free stamp interpreter.

As opposite to the stamp VM, this VM is stack based and not function based,
so the argument must be pushed on the stack before a function is called.
The stamp VM fetch the arguments after the function is called.
This requires more opcodes. On the other side, this VM opcodes are smaller
then the stamp ones, so the VM opcode size is approximative the same.
         
assign:	B12=B3 * B5 + B3 / 2
stamp: 
5(assign)+5(variable)+4(operation)+7(var)+7(var)+1(next)+19+19 = 67 bits
this VM:
8(variable)+8(variable)+8(math-mul)+16(var+add)+16(num+div)+12(store)=68 bits

I need some discussion for the minimal requirements, like bit variables
outside the pin ones, bit manipulating, and so on.

The interpreter is coded in hitech C and is relativly small.
A 12f675 as target is possible without the need to recode some parts in asm.

The virtual machine running on the stamp interpreter is this:

/* opcodes:
00vv vvvv	load var
01ss immX	load immediate , ss=bit size	0=4 1=8 2=12 3=16 bits

100f fiii	call user function with immediate args
		math  (add/sub/mul/div/mod/neg/not/pow) // band=mul bor=add
		cond  (lt/gt/ne/eq/le/ge/not/test)	// test=skip
		...
		nop as example
101i ifff	call user function with immediate args	
		store var + imm4
		input	hex/ascii/bin/string
		output	hex/ascii/bin/string
		...
110f ffff	call user function
111x iiii iiii	goto(1)/gosub(0) - gosub 00 = return , goto 255 = end,
				   gosub 255= debug
		PC is incremented before accessing the PC, 
		so 255 means location 0, and 00 location 1, both illegal.
		Return can be a user function in order to reduce the bytecode.

address: in multiply of nibbles (4 bits).  Address range: 0-255 = 128 eeprom
variables: count	index	size	name	notes
		32	00-31	bytes , B<nn>	pins=B30, dirs=B31
		16	32-47	bits	P<nn> 	overlaps B30-B31	
					D<nn>   overlaps B31
		16	48-63   words , W<nn>	overlaps B0-B31, little endian
		8	64-71	words , S<nn>	special usage.
stacks:		name	deep	type
	- data stack,    8	words
	- call stack ,   16	either 8 or 12 bits depending on defines
pins:	depending on configuration:
	- 8 i/o pins with full pin direction support P<0-7> D<0-7>, pins, dirs
	- 16 i/o pins with word direction access: P<0-15> pins (W16) dirs (W15)
	- 32 i/o pins with fixed direction: P<0-15>, read and write on different
		ports
	- no or limited pins access.
memory layout:
	- first byte: ee_offset, eeprom data offset
		`read 12, temp'  means	read eeprom location ee_offset+12
		 eeprom locations cannot be greater then 0xff.
		 example: ee_offset=250 means, 6 eeprom locations are available
		 on a 256 byte eeprom
	- code in multiplies of 4 bits. The default address range is
		256(128 bytes) , can be extendet to 4K (2Kbyte)  by
		compiler directive using code flash storage.
		Currently, the flash storage is used as 8bit only
		discarding the other 6bits. In future, this can be used
		in multiplies of 28 bits (4x7) caching 7 fourtets.
*/

I have put a initial version on http://m8-i.net/pic/int.c