Looking for suggestions on adding enhanced 16F instructions to gpsim

I'm moving into working with microchip's enhanced 16F chips such as the
16F1939 and the 12F1822. The enhanced architecture has a double handful of
new features:

- 32 banks
- 14 new instructions
- Linear address space for general purpose ram
- Program address space addressibility from the FSR/INDF registers
- A pair of FSR/INDF registers instead of one

It looks like a tactical backpatch of the 16F architecture with some 18F
features.

The question is what is the most expedient way to add this set of features
to gpsim?

Any suggestions welcome.

BAJ

-- 
Byron A. Jeff
Department Chair: IT/CS/CNET
College of Information and Mathematical Sciences
Clayton State University
http://cims.clayton.edu/bjeff