Re: Installing ISR for Interrupt 5
Chris Musial <cmusial-cK+/[email protected]>
| Newsgroups | gmane.comp.hardware.microcontrollers.tini |
|---|---|
| Message-ID | <[email protected]> |
Bryan, Thanks for the response. You had said to make sure J5 is not installed, however we are using it for the netboot. Could that be what's causing the rapid interrupts? Is the use of J5 incompatible with using int 5? (And if int 5 can't be used, presumably ints 2-4 can't be used since they share the same interrupt vector and enable bit). Chris Musial wrote: I checked that the code is clearing IE5 and it is. I'm still getting interrupt 5 firing continuously. I have found how to clear the EOWMI bit and am now doing that. However when our engineer put a scope on the line, he saw that the cpu was trying to drive the pin low while the external device was driving it high, and that may be causing the constant firing of the interrupt. The documentation says that the port can operate as either a general purpose i/o port or in an alternate mode based on the 'associated port 1 latch bit'. I can't find any documentation on this latch bit - is there some sort of setup I need to do so that port 1.7 (as well as 1.4 - 1.6) will be an input port driving the interrupt? P1.7 is used to enable quiet booting. Make sure that J5 is not installed or the line could be pulled to ground. I cannot find anywhere that P1.7 is touched in the TINIOS firmware other than explicitly through com.dalsemi.system.BitPort. ------------------------------------------------- This mail sent through IMP: http://horde.org/imp/ _______________________________________________ TINI mailing list TINI-6tN4nzCoH/[email protected] To UNSUBSCRIBE, edit your profile, or see list archives: http://lists.dalsemi.com/mailman/listinfo/tini