Bootstrap loader and High Speed Design: Error in the network camera design??
Peter Wein <[email protected]>
| Newsgroups | gmane.comp.hardware.microcontrollers.tini |
|---|---|
| Message-ID | <[email protected]> |
Hello everybody,
I am designing a 73.728Mhz Design based on the network camera design I
found on the web.
Because of the high speed the bootstraploader first has to copy the
content of the flash to a fast sram.
The flash of this network camera design is mapped to CE2 (400000h) and
the corresponding SRAM at CE3 (600000h).
The code they write for this seems to do exactly the opposite: It copies
the content of CE3 to CE2 in the range of 400000h to 480000h (please
look below my comments on the code).
If this correct, then the schematics must be wrong or the other way round.
However, when I want to load the firmware of TINIOS or my own
application into the TINI, isn"t JAVAKIT expecting to write the data to
the flash on CE2 (400000h)? It is also the place the TINI400RT should be
(should it really or is it not important?).
So I my two questions are:
1.) Suppose the case, the schematics are wrong! Could I configure the
JAVA Kit to load to flash mapped at CE3?
And if I can do it, how does the bootstrap loader of the ds80c400
knows that my code starts at 600000h to start the copying down to CE2?
2.) Suppose the code below is wrong and the schematics is right! I
change it so that it copies the code from CE2 to CE3 (the other way
round). Will tini still work there (at CE3, if I jump to it (likein my
comment in the last line below))? I don't think so...
So what can I do to make it right. I have a hell of time spent looking
all the examples, web sites and archives for the TINI, but did not find
anything like that.
Even I found the DS80C400 Bootstrap loader is not really good explained
(I only found that it is existing...). Also I did not find the
documentation of the network design sufficient in terms of how to build
it and transmit the tinios to the system....
A Documentation of the TINIOS or at Least a description how it exactly
interacts with the system, I did not find anything sufficient. As soon
as If I leave the path of javaprogramming, I find myself in a
jungle....CAN ANYBODY help me, give me a hint, or whatever??
Kind regards from South Africa
Peter Wein
US Stellenbosch
PEG Group
/*---------------------------------------------------------------------------------------------------------------*/
USE_DEFAULT_SPEED equ 1
DEFAULT_SPEED equ 61440 /* why this? = F000h*/
BASE_OFFSET equ 400000h /* what ?*/
FLASH_OFFSET equ 600000h /* what?*/
$include (ds80c400.inc)
$include (tinimacro.inc)
org FLASH_OFFSET /* Program is located in Flash at 6000000h? According
to the schematics is the flash on CE2, so mapped to 400000h */
sjmp start
db "TINI" /* For what is this? */
db 60h /* For what is this? */
start:
mov dps,#0h /* Set the
datapointerselect register to zero */
mov dptr,#copy_data /* DPTR0 is copydata (starts
after program) */
inc dps /* change to
DPTR1 */
mov dptr,#BASE_OFFSET /* DPTR1 is 400000h */
mov dps,#030h /* Set dps to toggle
between DPTR0 and DPTR1 every Movx instruction, starting with DPTR */
copy_loop:
movx a, @dptr /* GETX */ /* Get 1.databyte from
copydata *(somwehere 6000xxh) to the acc */
movx @dptr, a /* PUTX */ /* Put data from acc to 400000h */
movx a, @dptr /* GETX */ /* 2.byte */
movx @dptr, a /* PUTX */
movx a, @dptr /* GETX */ /* 3.byte */
movx @dptr, a /* PUTX */
movx a, @dptr /* GETX */ /* 4.byte */
movx @dptr, a /* PUTX */
movx a, @dptr /* GETX */ /* 5.byte */
movx @dptr, a /* PUTX */
movx a, @dptr /* GETX */ /* 6.byte */
movx @dptr, a /* PUTX */
movx a, @dptr /* GETX */ /* 7.byte */
movx @dptr, a /* PUTX */
movx a, @dptr /* GETX */ /* 8.byte */
movx @dptr, a /* PUTX */
mov a,dpx /* load
highest address byte of DPTR */
cjne a,#068h,copy_loop /* Is it 68, then stop
copying */
;
; Tell the firmware to go at WARP SPEED!!!
;
mov dps,#00h
if (USE_DEFAULT_SPEED=1)
mov dptr,#(BASE_OFFSET+7)
mov a,#HIGH(DEFAULT_SPEED)
PUTX
inc dptr
mov a,#LOW(DEFAULT_SPEED)
PUTX
endif
mov dptr,#(BASE_OFFSET+9)
mov a,#4
PUTX
;
; Wipe the heap
;
mov dptr,#0
mov dps,#010h
mov R0,#01
clr a
clear_heap_loop:
clr a
PUTX
PUTX
PUTX
PUTX
PUTX
PUTX
PUTX
PUTX
mov a,dpx
cjne a,#01,clear_heap_loop
ljmp BASE_OFFSET /* second case, it must be ljmp 600000h,
isn't it? */
copy_data:
END
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