Re: Bypass thoughts

  I think we're in the same ballpark here.  Next time I have a small test
board for some chip, I'll play with the "two of the same size in parallel"
vs. "one cap, and another at 1/100 it's value" approach.  I'll also take a
board with a HCS08 on it (which has only 3 bypass caps) and change out the 1
nF to a 100nF so all three are the same and make some measurements on it.
  I know the "spin frequencies" for caps (the self resonant point) has got
much better (higher) with time, and there's less lot to lot variations.  My
production house does much better with 0805 than 0603, and so it's possible
that when they get more accustom to 0603 that the smaller size will change
things too.  I started this practice back in the 0612 .1 uF days, and am
probably guilty of not re-thinking / re-verifying the approach.  So I
appreciate your email.  Bypass design is part of every PCB design, and it's
easy to forget that and get stuck in a rut.
  The key here is knowing about the impedance 'V' graph and the self
resonant point (if working with frequencies above 500 MHz).  That and some
knowledge about PCB layout and you're good to go.  I might also be overly
concerned about emissions because the product I'm working on has 120
unbalanced, unshielded, single ended wire coming out of it that are as
little as 1 foot and as long as 180 feet long.  It's a consumer produce, so
it must pass (and did pass) the tougher emissions requirements.  The
daughter board the 5282 is on has more $$s in the EMI suppression than in
the micro, and it's a multi-layer PCB.

  All this said, tacking on some more caps is a small time hit that can
eliminate a possible design problem on a new PCB layout.  If it makes a
difference, then all these issues being discussed here can be worked
through.

Regarding development platforms:

  Everything you've said makes sense, and I've suspected that Linux is the
way to go.  I was curious if anyone has had luck on a MAC now that it runs a
variant of Unix underneath it all.  It is clear that for debugging it's a PC
or linux.  The FPGA tools I use are only for PC's (Altera Quartus II free
Web Edition), it just seems odd to run something under cygwin that was
clearly written for a unix like system.  I suspect there will always be a PC
around somewhere, I just want to reduce my exposure, so to speak.

 - pete

> -----Original Message-----
> 
> My thoughts on bypassing are bit different.  Many people view bypassing
> as a sort of black magic, some feel they can "prove" that their method
> is the correct way, some religiously follow manufacturers guidelines,
> and others just throw some caps at the board and see what sticks.  This
> is my way - based on things I've read that sound scientifically
> reasonable, and on experience, but with absolutely no guarantees!
> 
> If you look at a capacitor's impedance-frequency graph, you get a sort
> of V.  At lower frequencies, it acts as a capacitor (lower impedance at
> higher frequencies).  At higher frequencies, it acts as an inductor
> (higher impedance at higher frequencies).  In the middle, there is a
> minimal impedance at its resonance frequency, where it acts as a
> resistor (at its ESR).  The inductance is almost entirely dependant on
> the package footprint, along with the layout on the board (wire lengths,
> via size and placement, etc.).  The ESR is mostly a matter of package
> *type* - larger capacitors in the same footprint will normally have more
> layers in parallel, and therefore lower ESR.  So if you compare two
> capacitors with the same footprint, the one with the higher capacitance
> is better in the "C" region, and is at least as good, often better, in
> the "L" region.  It's resonance frequency will be lower, but the smaller
> cap will be at best only slightly lower impedance at its higher
> resonance frequency.
> 
> The general rule, then, is to find the smallest footprint your
> production people are happy with (say, 0603), and then the largest
> capacitance easily and cheaply available in that package (I like 0603,
> 100 nF).  Any time you think you need a 100 nF and a 10 nF in parallel,
> you simply use two 100 nF caps - they will do a better job.  By the time
> you get to the point in frequency when a smaller cap might be better,
> the difference is probably already lost in the impedance of the tracks
> and the chip's pins or balls.  Make sure you've got a couple of vias
> tight up against each pad of your 100nF cap and you've done as good a
> job as you can.
> 
> The only possible problem here is that with most of your caps of the
> same size (you need bulk caps as well, of course), you have a single
> resonant frequency.  If you are unlucky, you could get standing waves at
> that frequency flying across your power plane, or local maxima and
> minima in the voltage.  The answer here is to keep your power plane
> somewhat irregular - you don't actually need a power plane to be a solid
> plane (as long as fast signals are referenced to a good ground plane).
> Break your power plane into lumps, with a lump under each fast chip and
> its surround bypass caps, with thick tracks back to your power supply
> for low DC impedance.  Then there are no issues with standing waves,
> since they have no big plane to bounce around in.
> 
> 
> It should be possible to get gcc working on a MAC, but its more at home
> on Linux or "proper" BSD.  MACs are not much used for embedded
> development work, so you won't find much ready-made support.  For
> example, CodeSourcery have binaries and source tarballs for gcc for
> Linux (and windows), but if you want to use a MAC, you'll probably have
> to compile it yourself.  Similarly, you're more likely to get support
> for debugger tools under Linux than a MAC.
> 
> mvh.,
> 
> David
> 


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