Re: Linux x uClinux for ColdFires: what is the best for what?
John Bodnar <[email protected]> Fri, 02 May 2008 16:00:08 -0500
| Newsgroups | gmane.comp.hardware.motorola.microcontrollers.coldfire |
|---|---|
| Organization | Freescale Semiconductor |
| Message-ID | <[email protected]> |
Bob Furber wrote: > Commodity DDR and flash today comes in 0.8mm BGA packages Yes, but these packages have split ball maps with a channel down the middle, making them not much harder to route to than a TSOP. We don't really have the luxury of being able to implement routing channels like commodity memories. If we were to go to sub-1 mm ball pitch, we need to incorporate routing channels by depopulating balls, and we'd likely end up in packages that are physically not much smaller than what we're doing with 1 mm ball pitch today. Cost matters, too, and it's less expensive to assemble a 1 mm pitch BGA than it is a 0.8 mm pitch BGA. For now, I most customers to whom I talk, even for high-volume applications, aren't requesting sub-1 mm pitches. With our I/O counts in the 144 to 416 ball range, the coarser 1 mm ball pitch seems to afford folks a little more leeway in escaping our ball maps out to the rest of the PCB within a reasonable number of layers. That's not to say there aren't customers who are space constrained and asking for smaller packages, though. There just aren't that many of them yet. > While in this wishful thinking state of mind, I cannot help mentioning > my Technicolor dream: A new, compact, fast, low powered MPC55xx with > the PowerPC ripped out and replaced with a ColdFire or Arm core with > FlexBus LPDDR/DDR2 interface ..and, oh, yes, don't forget USB Host & > Device and 100/100 Ethernet and Phy ..all for < $50. I don't see Ethernet PHYs getting integrated on-chip anymore. They're not conducive to being designed in sub-0.18 micron process technologies, and they've recently become about as commoditized as RS-232 level shifters. When I started work on the MCF5282, we were figuring $5 into the system cost for the PHY. We've now reduced that to $1 to $2 depending on the target market. That kind of cost erosion makes it difficult for us to recoup the costs of developing the PHY and integrating it. BTW, I reserve the right to backtrack on this for Gbit Ethernet. There's some commonality between a GbE PHY and things like PCIe and SATA PHYs, which do get integrated, that might make this possible. No promises, just an observation. > b. Having tasted eTPU and MIOS on the MPC5xx, I got addicted. eTPU... We really have got the thumbscrews on you :-) John -- POPI Classification [ ]General Business Information [x]Freescale Internal Use [ ]Freescale Confidential Proprietary --- [email protected] Send a post to the list. [email protected] Join the list. [email protected] Join the list in digest mode. [email protected] Leave the list.