Re: Finding Hardware Interrupt Number

Have you setup the EPORT regs?  The first 7 ints are EPORT ints that
usually require a little more configuration than just registering for
the int.

Just a thought.

--Kurt

Fahd Abidi wrote:
> Well looks like all is not working as expected. I checked the hardware
> and see the interrupts trigger on Interrupt Pin 5 using an oscope
> measuring the resistor connected to that pin. I fired 5 interrupts just
> to be sure and can capture them on the oscopse how ever I don't see the
> interrupts trigger in the kernel:
>
> # cat /proc/interrupts           
>  69:          0   MCP2515
>  77:       7528   ColdFire UART     
> Starting
>  78:          0   ColdFire UART
> d.en
> .
> .
> .
> .
>
> Interrupt 69 did not trigger as shown above. I assumed that the all the
> interrupt sources should be enabled in the uClinux kernel, is this
> correct to assume? Or do I need to modify the kernel to enable disable
> the interrupt thru the interrupt mask register? Does any one know where
> this needs to be done, or if it needs to be done?
>
> Thanks,
>
> Fahd Abidi
>
>
> -----Original Message-----
> From: [email protected] [mailto:[email protected]]
> On Behalf Of Fahd Abidi
> Sent: Wednesday, June 11, 2008 1:01 PM
> To: Fahd Abidi
> Subject: RE: [ColdFire] Finding Hardware Interrupt Number
>
> Looking at include/asm-m68knommu/m527xsim.h the ICR base is set to 0x40.
> And since I am using IRQ pin 5 this would mean that interrupt vector
> would be 0x45? I think. Which is 69, this matched what Marc has
> mentioned and also seems to match your IRQ offsets, so I mmight have it.
> I'm still new to this and learning.
>
> Thanks for all the help!
>
> Fahd Abidi
>
> -----Original Message-----
> From: [email protected] [mailto:[email protected]]
> On Behalf Of Allon Stern
> Sent: Wednesday, June 11, 2008 12:01 PM
> To: Fahd Abidi
> Subject: Re: [ColdFire] Finding Hardware Interrupt Number
>
>
> On Jun 11, 2008, at 11:34 AM, Allon Stern wrote:
>
>   
>> In my linux environment (2.6), the interrupt# was IH_GPIO_BASE+4 (for 
>> IRQ pin 4)
>>     
>
> Whoops, that was on the OMAP. Dang #ifdefs!
>
> On the Coldfire, it was 64+7 for IRQ pin 7.  Sorry for any confusion.
>
> -
> allon
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