CFI MTD on 5282

I've got a custom M5282. We have a memory-mapped MTD.

Several fun problems here...

#1: How do I add this device to the baseline 5282 config? It'd be  
handy to use CFI, as it is a CFI compliant part
This is my big problem at the moment. I can find examples that seem  
to deal with SPI, and the guidance I'm getting from a co-worker who  
added this part to an ARM platform is being of minimal help.....I can  
find references which are pretty aged. I'm trying to do this on a 2.6  
kernel (using the latest baseline. Thanks, Greg!)


#2: this device is a 64MB part. Fun, since we don't have quite the  
number of address lines we need. The hardware designer ran CS2 and  
CS3 to
the high order address lines. (A24/A25)

I've decided to configure CS2 and CS3 as GPIOs and drive it as a  
banked MTD. Is this possible?
The chip appears as two stacked chips with a common chip select, and  
the A25 selects the die.
I can bank them on the high order address line; I MIGHT be able to  
get a revision which ANDs the CS0 going to the chip with CS2 going to  
A24 on the flash, which would let me set up two chip selects to get a  
contiguous memory space for it;
Anyone know if CFI will get all munged up if the top and bottom  
halves of the memory are reversed? That is, if the base address  
points to the top half of the chip, and the middle address points to  
the bottom?

And without that revision, is it possible to do a banked MTD with the  
bank selecting two halves of a single strataflash part? (I'd have  
four banks, each one half of a die, and two dies)

(it's a Numonyx P30 strataflash, FWIW)


-
allon


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