QADC64E Module Configuration Register difference
"johnnieblom" <[email protected]>
| Newsgroups | gmane.comp.hardware.motorola.microcontrollers |
|---|---|
| Message-ID | <[email protected]> |
I have a problem with the bitmapping in the QADCMCR (called QADC64MCR
in m_qadc64.h). There is difference between the definition (in
m_qadc64.h) and the manual(MPC561RM.pdf).
MPC561RM.pdf m_qadc64.h
bits Name bits Name
0 STOP 0 STOP
1 FRZ 1 FRZ
2:5 - 2:7 -
6 LOCK
7 FLIP
8 SUPV 8 SUPV
9:15 - 9 MSTR
10 EXTCLK
11 -
12:15 IARB
What is correct and is it possible to find any documents regarding this?
Regards
Johnnie Blom
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