RE: ownload code into on chip flash(rom)

The code you have attached is pretty much position independent - it
doesn't effect your decision as to what to do with the linker file.

Basically you have two choices - run from RAM or run from FLASH - you
don't need to put your code in FLASH just to see if an interrupt is
working.  Your interrupts can be based at either 0x00000000 or
0xfff00000 depending in MSR[IP] value. For 0xfff00000, you could locate
SRAM there using the chip selects.  There is previous emails in the data
base on this subject plus AN2109 goes into great detail on this subject.

Regards,
Allan

-----Original Message-----
From: [email protected] [mailto:[email protected]] On Behalf
Of sripathy23
Sent: Tuesday, September 13, 2005 5:31 PM
To: [email protected]
Subject: [MPC500] ownload code into on chip flash(rom)


Dear members

with my earlier mail regarding PIT interrupt, i was able to run the 
interrupt but i am not getting the correct output. what i am trying 
to do is that after programming the PIT interrupt using C only (i am 
using the example from document AN2109 . Instead of using sci i am 
using the PIT interrupt). I was able to fix the errors related to 
illegal pragma  and the warning. I have changed the linker command 
file . I found an example form code warrior for C interrupt handler. 
Now I dont get any error. I need to download my code into ROM to see 
whether the interrupt is working or not. what should i do. should i 
need to set the jumpers and the switches. I would appreciate if 
anyone can help me in this regard.

can anyone look at this code and tell me whether i should change the 
liker command file


here is my main file and the liker command file. Is the 
section .IrqSect defined in the .lcf file write? 

main Program

	#pragma push
	#pragma section code_type".text" code_mode=far_abs
	void PIT_Int(void);
	#pragma section code_type ".IrqSect"
	void Ext_Isr();
	#pragma pop


void init_555()
{
	USIU.SYPCR.R = 0xffffff03;		
	USIU.PLPRCR.B.MF = 0x009;	
	while(USIU.PLPRCR.B.SPLS==0)
	UIMB.UMCR.B.HSPEED = 0;		
}

void init_mios()
{							
	MIOS1.MCPSMSCR.B.PSL = 0x4;		
	MIOS1.MCPSMSCR.B.PREN = 1;			
	MIOS1.MPWMSM2SCR.B.CP = 0xf6;	
	MIOS1.MPWMSM2PERR.R = 2000;		
	MIOS1.MPWMSM2PULR.R = 500;		               
MIOS1.MPWMSM2SCR.B.EN = 1;	
}



void initPIT()
{					
USIU.PITC.B.PITC = 0x7777;		
USIU.PISCR.B.PITF = 0;		
USIU.PISCR.B.PTE  = 1;			
USIU.PISCR.B.PIRQ = 0x80;	
USIU.PISCR.B.PIE = 1; 		
USIU.SIMASK.R = 0x40000000;	
}
   
   
 

void main()

{
	init_555();
	init_mios();		
	initPIT();					
	asm(" mtspr EIE, r0");		
	while (1==1) {
		loopctr++;
	}
}

#pragma interrupt SRR on 

void Ext_Isr()
{

#define LEVEL0 0x40000000
asm (" mtspr EID, r0 "); // Set MSR.RI - now recoverable
if (USIU.SIPEND.R&LEVEL0) // Check if IRQ is level 0
{
PIT_Int(); // Call PIT C interrupt handler
}
else
{
// Just return
}
asm (" mtspr NRI, r0 "); // Clear MSR.RI - now irrecoverable

};
#pragma interrupt off


 void PIT_Int()
{
if(USIU.PISCR.B.PS == 1)
 {
     pitctra1++;					// Increment 
PIT interrupt counter
     if(pitctra1==100)	
     {
     countera1 = countera1+100;
     MIOS1.MPWMSM2PULR.R = 100;		/* Set Duty Cycle to 25%*/
     MIOS1.MPWMSM2SCR.B.EN = 1;		/* Enable output on PWM2 */
	 USIU.PISCR.B.PS = 1;	    // Negate interrupt request
     flag1=1;	
	 pitctra1 = 0;
     }
     else
     {
     	
     }
 }
else
 {
    	
 }
}





LINKER COMMAND FILE


_flash_source	= 0x00c10000;		
MEMORY {
    
	ram : org = 0x00c02000
	rom : org = 0x00000000 
       pit : org = 0x00000500
}
FORCEACTIVE { gInterruptVectorTable, __reset }

SECTIONS {

	.reset : {} > rom
	.init  : {} > rom
	.IrqSect : {}>pit
	GROUP : {
		.text (TEXT) ALIGN(0x1000) : {}
		.rodata (CONST) : {
			*(.rdata)
			*(.rodata)
		}
		.ctors : {}
		.dtors : {}
		extab : {}
		extabindex : {}
	} > rom 	// for ROM images, this can be 'rom' if you 
want to execute in ROM
				// or 'code' if you want to execute 
in RAM
	GROUP : {
		.data : {}
		.sdata : {}
		.sbss : {}
		.sdata2 : {}
		.sbss2 : {}
		.bss : {}
		.PPC.EMB.sdata0 : {} 
		.PPC.EMB.sbss0 : {}		
	} > ram

	.dummy ALIGN(64): {}
	
	_flash_dest = _f_reset;			
	_flash_size = _f_dummy_rom - _flash_dest;

	.fcopy BIND(_flash_source + _flash_size) ALIGN(64) : {
	*(.fcopy)
	}

	.fcopy_data : {} 
	.BINARY : {}
}







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