RE: PB555 and C++

Hello Lei,

One of our engineers said there are 3 possibilities. 


1) There are some variants of the 5xx chips that support code
compression which if you enable it (please see the documentation) there
is a post link phase using a tool called Squeezard which will compress
the code and the chip has the ability to read the compressed code. If
you don't have one of those chips or if your copy of CW doesn't support
it, then it won't work for you. 


2) Starting about a year or 2 ago, CW EPPC started shipping size reduced
versions of the C libs. These libs have SZ in the name and we only ship
them prebuilt for certain processors such as e500 for which the lib is
called MSL_C.PPCEABI.bare.SZ.E.a. You can rebuild the H MSL C lib with
the prefix file ansi_prefix.PPCEABI.bare.SZ.h. You also need to use
ansi_prefix.PPCEABI.bare.SZ.h to build your project. Again if your copy
of CW doesn't have ansi_prefix.PPCEABI.bare.SZ.h, then it won't work for
you. 


3) Change the floating point support to none assuming you do not need it
and use N libs. If you are using cout or printf, those functions can
cause some bloat and you can hack at their implementation to only
support the format characters you need. 

Ron

--  
Ron Liechty  
Ombudsman Freescale Developer Technology
[email protected] 

coles555 Wrote:
 
Hi there, 
I am working with a PB555 board using Codewarrior for development 
purposes. Now all the code that I am using are written in C++ and the 
Metrowerks Standard C++ Library (MSL_C++.PPCEABI.BARE.H.a and 
MSL_C.PPCEABI.BARE.H.a) takes up 38 Kbytes of data space. However, the 
PB555 board has only a mere 26 Kbytes of SRAM. My question is whether 
or not it is possible to implement C++ code in the PB555 board? If so, 
how can those C++ Library data fit within SRAM? 




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