RE: MCP2515

Question 1) is simple and you can easily verify by experimentation, but
right justify your data as you suggest.  The upper bits in the word ae
not transmitted and are therefore don't care.  

2) The QSPI allows you to hold the CS either active or not between words
(bytes). I believe it's the CONT bit in the command RAM that controls
this.

Regards,
Allan

-----Original Message-----
From: [email protected] [mailto:[email protected]] On Behalf
Of joydeep roy
Sent: Tuesday, January 10, 2006 11:28 PM
To: MPC500 MPC500
Subject: [MPC500] MCP2515


Hi Everyone
i am having a small querry here regarding testing of
MCP2515 through SPI of MPC565.

There are basically two queries:

1)We know that TRANRAM of QSPI RAM is of size equal to
a word.But in order to talk to MCP2515 we have to send
some instruction bytes to it and then address bytes
and data. All these things are in bytes but they
should be placed in TRANRAM in which one queue pointer
location is of size of a word. Even if we make the
BITSE bit in COMDRAM 0(that makes it an 8 bit
transmission), how exactly are we going to place the
data in the TRANRAM?
Are we supposed to right justify it and place all 0s
in the first byte? 
Or should we place two bytes of data consecutively in
the TRANRAM word space?


2) As we know, for all the instructuion bytes we have
to lower the CS pin and then raise it again once that instruction is
over. But if we are putting the whole sequence of instruction byte and
the address of the MCP2515 registers and the data in the TRANRAM at a
time and then enable QSPI, 
 how are we going to lower the CS signal and then
raise it in between? 
As per my understanding, once we enable QSPI, the
transmission will go on until ENDQP is reached and
then QSPI is disabled automatically. How can we then
toggle the CS signal in between?


Please help me in this regard.Looking forward to your
replies.
Thanks in advance

Joydeep Roy

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