MPC565 startup issues

I'm trying to debug a new MPC565 design. The symptoms are that at powerup, regardless of whether BDM is connected or not, I get sreset and freeze indications followed by the freeze indication going away almost immediately. The processor never appears to come out of sreset. It is coming out of poreset and hreset. BDM communications do not work since the processor either never gets into or doesn't stay in debug mode. I believe that since SRESET is never negated DSCK is never read.
 
The design attempts to read the RCW externally by pulling RSTCONF high. My understanding is that the RCW is latched as HRESET is negated so it should be being read. Are there any scenarios where an improper setting of the RCW (eg a read error resulting in an internal flash disable on a single chip board) that would leave the processor in sreset? Any other common causes of sreset sticking that I should look for?
 
Power sequencing appears to be fine, and the PLL appears to be locking up ok since I'm seeing a 312.5 kHz ENGCLK indicating a 20MHz system clock which should be correct for a 4MHz oscillator and MODCK(1:3)=010.
 
Any clues or suggestions welcome.
 
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