RE: Re:Re: problem in running 'Hello_fl' example by codewarrior 8.7

"Dobbin Allan" <[email protected]> Tue, 6 Jan 2009 09:53:14 -0700
Newsgroups gmane.comp.hardware.motorola.microcontrollers
Message-ID <4147ED8B92A864498825C07E53594E4A03FAF9EC@az33exm20.fsl.freescale.net>
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Is EPP an improvement, or were able to connect previously?
 
Try debugging to see where it fails - 4000, 2000, 1000?  
Try increasing the wait states and the burst wait states.
Try changing the address mask in the OR register to see if that helps.
 
When you enabled the debugger to verify downloads, what addresses
failed?
When you enter at __start and view mixed mode, do you get the correct
opcodes?
 
May I ask what line of business you are in?
 
Regards,
Allan

________________________________

From: [email protected] [mailto:[email protected]] On Behalf
Of F KH
Sent: Tuesday, January 06, 2009 10:26 AM
To: [email protected]
Subject: [MPC500] Re:Re: problem in running 'Hello_fl' example by
codewarrior 8.7



Thanks for you replies.
I set the parallel port on EPP and it seems OK.
The memory is external SRAM(4 x KM736V987) in address 0x10000000 and CS1
is enabled for it in config file:

; Chip select CS1 - external synchronous burst RAM
writemem.l  0x2fc10c  0xFF800000      ; OR1=0xFF800000
                                                         ; BSCY
0x#######E = 0x0 - 0-clock burst beat length
                                                         ; SCY
0x######F# = 0x0 - (2+SCY)*clock = 0 wait
                                                         ; AM
0xFFFE#### = 0xFFF80000 - 512 kByte
                                                         ;
= 0xFFF00000 -   1 MByte
                                                         ;
= 0xFFE00000 -   2 MByte
                                                         ;
= 0xFFC00000 -   4 MByte
                                                         ;
= 0xFF800000 -   8 MByte
                                                         ;
= 0xFF000000 -  16 MByte
writemem.l  0x2fc108  0x10000001       ; BR1=0x10000001
;writemem.l 0x2fc108 0x10000001        ; BR1=0x00000001 relocation to
base address 0x0
                                                         ; Bit
0x#######1 = 1 - region valid
                                                         ; Bit
0x#######2 = 0 - burst access enabled
                                                         ; Bit
0xFFFF#### = 0x1000 - Base address = 0x10000000

I select connect from debug menu and system connected,then in
debug>EPPC>fill memory window set:
Memory Type:32 bit
Memory address:0x10000000
Memory Size:100

and it writes to memory(I can view).But when I check it for Memory size
0x8000 makes error and every thing goes wrong.  
I select the checkbox for 'verify memory writes',the verify fails.
PhyCORE has 4M SRAM and i don't know what make this errors?

Best Regards
Farzane



 


[Non-text portions of this message have been removed]


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            <p>Is EPP an improvement, or were able to connect previously?<br>
 <br>
Try debugging to see where it fails - 4000, 2000, 1000?  <br>
Try increasing the wait states and the burst wait states.<br>
Try changing the address mask in the OR register to see if that helps.<br>
 <br>
When you enabled the debugger to verify downloads, what addresses<br>
failed?<br>
When you enter at __start and view mixed mode, do you get the correct<br>
opcodes?<br>
 <br>
May I ask what line of business you are in?<br>
 <br>
Regards,<br>
Allan<br>
<br>
____________<wbr>_________<wbr>_________<wbr>__<br>
<br>
From: <a href="mailto:MPC500%40yahoogroups.com">MPC500@yahoogroups.<wbr>com</a> [mailto:<a href="mailto:MPC500%40yahoogroups.com">MPC500@yahoogroups.<wbr>com</a>] On Behalf<br>
Of F KH<br>
Sent: Tuesday, January 06, 2009 10:26 AM<br>
To: <a href="mailto:MPC500%40yahoogroups.com">MPC500@yahoogroups.<wbr>com</a><br>
Subject: [MPC500] Re:Re: problem in running 'Hello_fl' example by<br>
codewarrior 8.7<br>
<br>
Thanks for you replies.<br>
I set the parallel port on EPP and it seems OK.<br>
The memory is external SRAM(4 x KM736V987) in address 0x10000000 and CS1<br>
is enabled for it in config file:<br>
<br>
; Chip select CS1 - external synchronous burst RAM<br>
writemem.l  0x2fc10c  0xFF800000      ; OR1=0xFF800000<br>
                                                         ; BSCY<br>
0x#######E = 0x0 - 0-clock burst beat length<br>
                                                         ; SCY<br>
0x######F# = 0x0 - (2&#43;SCY)*clock = 0 wait<br>
                                                         ; AM<br>
0xFFFE#### = 0xFFF80000 - 512 kByte<br>
                                                         ;<br>
= 0xFFF00000 -   1 MByte<br>
                                                         ;<br>
= 0xFFE00000 -   2 MByte<br>
                                                         ;<br>
= 0xFFC00000 -   4 MByte<br>
                                                         ;<br>
= 0xFF800000 -   8 MByte<br>
                                                         ;<br>
= 0xFF000000 -  16 MByte<br>
writemem.l  0x2fc108  0x10000001       ; BR1=0x10000001<br>
;writemem.l 0x2fc108 0x10000001        ; BR1=0x00000001 relocation to<br>
base address 0x0<br>
                                                         ; Bit<br>
0x#######1 = 1 - region valid<br>
                                                         ; Bit<br>
0x#######2 = 0 - burst access enabled<br>
                                                         ; Bit<br>
0xFFFF#### = 0x1000 - Base address = 0x10000000<br>
<br>
I select connect from debug menu and system connected,then in<br>
debug&gt;EPPC&gt;fill memory window set:<br>
Memory Type:32 bit<br>
Memory address:0x10000000<br>
Memory Size:100<br>
<br>
and it writes to memory(I can view).But when I check it for Memory size<br>
0x8000 makes error and every thing goes wrong.  <br>
I select the checkbox for 'verify memory writes',the verify fails.<br>
PhyCORE has 4M SRAM and i don't know what make this errors?<br>
<br>
Best Regards<br>
Farzane<br>
<br>
[Non-text portions of this message have been removed]<br>
<br>
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