Re: RCM6700 6 serial ports and fat

Phil D <[email protected]>
Newsgroups gmane.comp.hardware.rabbit-semiconductor
Message-ID <CAL8BBoP7moM9my=cEB394GoBXvcOejAVhvWv3Z6rYPBsi3JPqw@mail.gmail.com>
From my experience of trying to utilise all 6 ports and the serial flash my
flash performance was erratic, in the end I left port B dedicated to fat
storage in my application.

Phil

On 26 July 2012 01:01, akisppoli <akisppoli-/[email protected]> wrote:

> **
>
>
> Hi all
>
> I have a problem using an RCM6700 with the 6 serial ports enabled and the
> fat filesystem. In datasheets i saw that rcm uses the serial port B
> pins to drive the serial flash (PD4,PD5,PD6). In IOconfig i have change
> the serial portB to pins PC4,PC5. In this configuration if the serial port
> B is closed, the fat works fine but if is opened some times the fat works
> ans some times blocks (is in blocking mode) randomly.
> There is another define that i missed? I will test to open the portB only
> when i need it (when i use it i dont need the fat) but is a safe method ?
>
> Below is all the definitions
>
> #define AINBUFSIZE 31
> #define AOUTBUFSIZE 31
> #define SERA_TXPORT PCDR
> #define ADRIVE_TXD 6
> #define SERA_RXPORT PCDR
> #define ADRIVE_RXD 7
> #define BINBUFSIZE 31
> #define BOUTBUFSIZE 31
> #define SERB_TXPORT PCDR
> #define BDRIVE_TXD 4
> #define SERB_RXPORT PCDR
> #define BDRIVE_RXD 5
> #define CINBUFSIZE 31
> #define COUTBUFSIZE 31
> #define SERC_TXPORT PCDR
> #define CDRIVE_TXD 2
> #define SERC_RXPORT PCDR
> #define CDRIVE_RXD 3
> #define DINBUFSIZE 31
> #define DOUTBUFSIZE 31
> #define SERD_TXPORT PCDR
> #define DDRIVE_TXD 0
> #define SERD_RXPORT PCDR
> #define DDRIVE_RXD 1
> #define EINBUFSIZE 31
> #define EOUTBUFSIZE 31
> #define SERE_TXPORT PEDR
> #define EDRIVE_TXD 6
> #define SERE_RXPORT PEDR
> #define EDRIVE_RXD 7
> #define FINBUFSIZE 31
> #define FOUTBUFSIZE 31
> #define SERF_TXPORT PDDR
> #define FDRIVE_TXD 2
> #define SERF_RXPORT PEDR
> #define FDRIVE_RXD 3
>
> and the settings
>
> serAopen(9600L);
> WrPortI(SACR,&SACRShadow, 0x01);
> serBopen(9600L);
> WrPortI(SBCR,&SBCRShadow, 0x01);
> serCopen(2400L);
> WrPortI(SCCR,&SCCRShadow, 0x01);
> serDopen(2400L);
> WrPortI(SDCR,&SDCRShadow, 0x01);
> serEopen(2400L);
> WrPortI(SECR,&SECRShadow, 0x21);
> serFopen(2400L);
> WrPortI(SFCR,&SFCRShadow, 0x11);
>
> WrPortI(PBDDR,&PBDDRShadow,0xDC); // Port B Input and output Pins
> WrPortI(PCFR,&PCFRShadow,0x55); // Serial Port C
> WrPortI(PDALR,&PDALRShadow,0x30); // Serial Port F
> WrPortI(PDDDR,&PDDDRShadow,0x64); // Serial Port F
> WrPortI(PDFR,&PDFRShadow,0x04); // Serial Port F
> WrPortI(PEAHR,&PEAHRShadow,0x30); // Serial Port E
> WrPortI(PEDDR,&PEDDRShadow,0x40); // Serial Port E
> WrPortI(PEFR,&PEFRShadow,0x40); // Serial Port E
> WrPortI(SACR,&SACRShadow,0x01); // Serial Port A
> WrPortI(SBCR,&SBCRShadow,0x01); // Serial Port B
> WrPortI(SCCR,&SCCRShadow,0x01); // Serial Port C
> WrPortI(SDCR,&SDCRShadow,0x01); // Serial Port D
> WrPortI(SECR,&SECRShadow,0x21); // Serial Port E
> WrPortI(SFCR,&SFCRShadow,0x11); // Serial Port F
>
> Thank's
>
> Akis
>
>  
>
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