Re: BL2100 Expansion headers (LCD) to add extra IOs
Scott Henion <[email protected]>
| Newsgroups | gmane.comp.hardware.rabbit-semiconductor |
|---|---|
| Message-ID | <[email protected]> |
On 3/27/2013 10:09 AM, Stan Hsu wrote:
> It sounds like you can not use the Aux IO, but use the A0-A3 address
> lines to indicate write and read and also which chip to read/write.
> Then just use the PE7 to enable the corresponding chip? AuxIO would
> do so much of the work for you so it is much easier to realize.
Again, there is no difference. If it had port B for address and port A
for data and aux I/O, you still have the same issue of no /IORD or /IOWR
line.
Aux I/O uses Port B for lower address lines and port A for data.
Regular external I/O uses the address an data busses of the CPU.
The timing is about the same.
Once PE7 is set up for either the accesses are the same instructions.
You can use RdPortE() and WrPortE() the same on either.
Just set up IB7CR for external I/O then use Rd/WrPortE() with addresses
0xe00X. X= A0-3. Exactly the same for aux I/O.
Access times are the same either way. Speed will depend on SW. ASM will
help. With Softools, I find I don't need much ASM for speed.
The only real difference is putting something directly on the data bus
can lock up the CPU if chip selects and data enables are not right as
you get a bus collision. The board takes care of this via a data buffer
only enabled on PE7 or PE0 and /IORD. They also buffer A0-3 so you can't
interfere with the CPU memory.
>
> In essence, it does not sound too bad but not sure.
>
> Also afraid if the SW will interfere somehow with the existing board.
>
>
Should not unless you ignore PE7 as an enable, then it would interfere
with the external I/O on PE0.
--
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Scott G. Henion, Consultant
Web site: http://SHDesigns.org
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