Re: Timer interrupt frequency (50Hz vs 60 Hz)

Juan Castro via Coco <coco-uNHYcr1XS/wmlAP/[email protected]>
Newsgroups gmane.comp.hardware.tandy.coco
Message-ID <CAGhS81FXdLOw8euGE7gBb1Ty2MYyjTaPaKh19jueBAvJxa-8Lw@mail.gmail.com>
SUCCESS! Left: PAL CoCo. Right: NTSC CoCo. Below, the code I put in the ROM
initialization.

You want seconds, just use TIMERL/HPOINT(4)

[image: image.png]


EUROCLOCK       EQU 50
AMERICLOCK      EQU 60

                LDX     #0              * FIND OUT WHETHER IRQ IS 50 OR 60
HZ
                LDA     TIMVAL+1
WAIT1STCHANGE   LDB     TIMVAL+1
                PSHS    B
                CMPA    ,S+
                BEQ     WAIT1STCHANGE
WAIT2NDCHANGE   LEAX    1,X
                LDA     TIMVAL+1
                PSHS    B
                CMPA    ,S+
                BEQ     WAIT2NDCHANGE
                LDA     #EUROCLOCK
                CMPX    #649            * A REASONABLE THRESHOLD
                BHI     NOBURGERS4ME
                LDA     #AMERICLOCK
NOBURGERS4ME    STA     TICKSPERSEC


Juan Castro
Enviado do meu Olivetti Programma 101
http://retropolis.com.br


Em qui., 20 de mar. de 2025 às 18:39, Juan Castro <[email protected]>
escreveu:

>
> Em qui., 20 de mar. de 2025 às 18:20, Allen Huffman via Coco <
> coco-uNHYcr1XS/wmlAP/[email protected]> escreveu:
>
>>
>> > I just thought of a horrid solution: count how many times a loop ran
>> > between two interrupts, and apply some tolerance. Of course, I'd have to
>> > set CPU frequency to baseline 0.89 MHz beforehand. Get typical values
>> and
>> > apply some tolerance. Do I really need to do that?
>>
>> That might indeed be the way to go. It would only take a 1/50th of a
>> second, if you could time it that fast ;-)
>
>
> I imagine it'd go like this. I'll take advantage of the TIMER value being
> incremented by the existing IRQ:
>
> Let COUNTER = 0
> Let A = TIMER_LSB
> WHILE TRUE:
>     Let B = TIMER_LSB
>     If A != B
>         Break
> WHILE TRUE:
>     COUNTER++
>     Let A = TIMER_LSB
>     If A != B
>         Break
> Make decision based on COUNTER value -- in an Europe CoCo it'll be roughly
> 20% greater than in an Americas CoCo.
>
> Hey, the pseudocode above is easily translatable to 6809 ASM. Let me see
> if COUNTER is safe to be 16 bits:
>
> dt = max time between two IRQs = 0.02s
>
> How many 6809 cycles are in dt?
>
> Answer = 0.02 * 890,000 = 17,800
>
> Peachy! COUNTER can be the X register, no problem.
>
>


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