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<CABROLXufP6afjE3MO0xNAN4stx0RV_azMEo5SXOkNJp3dyjOMg@mail.gmail.com> |
Touche, but a good software developer *never *uses untested libraries, now
that would just be silly. ;-P.
[image: Caption this picture]
On Tue, Feb 17, 2015 at 3:15 PM, Onestone [email protected] [msp430] <
[email protected]> wrote:
>
>
> Wrong, totally. the first rule of software development is that the best
> code is the one that you personally know has been fully debugged, and
> usually that is one that you wrote. If you trust others to write better
> code than you then you are asking for a world of grief.
>
> Who says I'm a bear? Anyway it's 'built in' not 'build in'. :-P
>
> Al
>
>
> On 18/02/2015 9:38 AM, Jake Grajewski [email protected] [msp430] wrote:
>
>
>
> Hi All,
>
> First off, The first rule of software development is that the best code
> is the one you didn't have to write ^^.
>
> I agree with Al here, why aren't you using the build in UART tool in the
> microprocessor. It is build to be used in this way, and the only reason
> ever not to is if you have to use a certain chip and you have run out of
> UART ports to use.
>
> @Martin: Now you are just poking the bear aren't you.
>
> Cheers,
> Jake
>
> On Tue, Feb 17, 2015 at 2:07 PM, Onestone [email protected]
> [msp430] <[email protected]> wrote:
>
>>
>>
>> Why oh why are you bit banging this when the MSP430 has an extremely
>> simple UART in hardware. Are interrupts that fightening?
>>
>> Al
>>
>>
>> On 18/02/2015 2:21 AM, [email protected] [msp430] wrote:
>>
>>
>>
>>
>> Hello, I'm trying to communicate with my RF module through UART
>> interface. However, I get many errors even with low load. I suspect that
>> I have an issue with the way that I configure the clock or the UART.
>>
>>
>> Basically, for the UART functionality I use
>> http://glitovsky.com/blog/?p=300
>>
>> (I configured the connection as 8N1 at 115200).
>>
>>
>> The clock configuration below is used with MCLK = 25 MHz ( when I use
>> it with MCLK=16 MHz I cannot communicate with the UART module at all ) .
>>
>>
>> P5SEL |= 0x0C;
>>
>> /* Select REF0 for FLL reference. */
>>
>> UCSCTL3 &= ~SELREF_7;
>>
>> UCSCTL3 |= SELREF_2;
>>
>>
>> /* Set ACLK to use REF0CLK.
>>
>> * Set SMCLK to use the DCO.
>>
>> */
>>
>> UCSCTL4 &= ~SELA_7 & ~SELS_7 & ~SELM_7;
>>
>> UCSCTL4 |= SELA_2 | SELS_4 | SELM_4;
>> /* Initialize FLL. */
>> Init_FLL_Settle(mclk/1000L, mclk/32768);
>>
>> XT2_Start(XT2DRIVE_0);
>>
>> UCSCTL4 &= ~SELA_7;
>> UCSCTL4 |= SELA_2;
>> UCSCTL8 |= SMCLKREQEN | MCLKREQEN | ACLKREQEN;
>> /* Enable interrupt for TBCCR0. */
>> TBCCTL0 = CCIE;
>>
>> /* Number of ticks per millisecond. */
>> clock.aclk = 32768;
>> clock.ticks_per_interrupt = clock.aclk / 1000;
>> TBCCR0 = clock.ticks_per_interrupt;
>>
>> /* Use ACLK, set timer to up-count mode, and start timer at zero. */
>> TBCTL = TBSSEL_1 | MC_2 | TBCLR;
>>
>> /* Enable interrupts. */
>> __bis_SR_register(GIE);
>>
>>
>> Thanks,
>> Mike
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>
>
> --
> Thomas J. Grajewski
>
>
>
>
>
>
--
Thomas J. Grajewski