Re: Cycle Counting--Too Many

I know it makes sense that "xor.b #0x1,&P1OUT" should be 4
cycles, given the constant generator. But can you find the
specific statement in the Family Guide that mentions using
the constant generator, instead of an inline constant,
requires one less clock than it would if the constant were
say #0xDD?

I just looked at SLAA0024 on TI's web site, looking at a
table on page 9-24, section 9.3.1, and it looks to me like it
is still 5 cycles. If I'm reading this correctly, then that
is at least one tiny detail to start the process of
accounting for differences.

I haven't spent more than 10 minutes yet, though. Just a
quick scan and then dragging up the PDFs for a moment. The
other thing that crosses my mind is if there might be a few
SMCLKs involved after the LPM mode bits are changed to sleep
the CPU. Do you know if there is a paper around where
counting SMCLK cycles at a pin is addressed when going into
sleep, or coming out? I don't recall reading one, but perhaps
looking for one might also help resolve the question.

Meanwhile, if something else comes to mind I'll post it.

Jon


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Posted by: Jon Kirwan <[email protected]>
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