RE: Cycle Counting--Too Many

Jon,

I think your argument in using only the figure on page 9-24 of SLAA024 is flawed in that the figure does not account for Constant Generator use for the 6 (from memory?) constants unless the reader makes the conversion to register mode for them.  Now we could go back and forth on this for a long time, so I just programmed a second xor.b #0x1,&P1OUT to immediately follow the first.  The resulting pulse is 4 cycles long.  And, just to be complete I changed the two xors to xor.b #0x11,&P1OUT.  This pulse is 5 cycles long.
/end/ message to Jon

So far, I have found two more things:

1) LPM2 needs to be added to the list of LPM 3 and 4 needing 2 extra cycles;  Its burst length is the same as LPM3; I have not and probably will not test LPM4.

2)Curiouser and curiouser: If I just comment out the clearing of the low power modes within the ISR, I count a burst of 12 cycles but the 8 cycles for LPM3 Interrupt Acceptance and 5 for RETI says the burst should be 13.  (I was about to give a crazy enough analysis here that would have almost been bad enough to justify removing me from the group, but, luckily, I was aroused from my sleep-deprived stupor.) 

I'll keep investigating, but may be silent over the weekend and into next week.

Emmett Redd Ph.D.   mailto:[email protected]
Professor                                 (417)836-5221
Department of Physics, Astronomy, and Materials Science
Missouri State University             Fax (417)836-6226
901 SOUTH NATIONAL                   Lab (417)836-3770
SPRINGFIELD, MO  65897   USA    Dept (417)836-5131

In statesmanship get the formalities right, never mind about the moralities. -- Mark Twain.
________________________________________
From: [email protected] [[email protected]]
Sent: Friday, September 18, 2015 12:02 PM
To: MSP430 List
Subject: Re: [msp430] Cycle Counting--Too Many

I forgot to add another thought about your "Table 3-16" here:

On Fri, 18 Sep 2015 09:44:06 -0500, you wrote:

>Addressing Mode Length of
>Src   Dst    No. of Cycles    Length of Instruction       Example
>Rn    &EDE         4                   2                  MOV R5,&EDE versus
>#N    &EDE         5                   3                  ADD #33,&EDE

as juxtapositioned against the table on page 9-24, section
9.3.1, that I earlier pointed out on SLAA0024. That table I
provided IS explicit. Your table is also explicit. They are
in conflict, it appears. Mine comes from an ancient MSP430
document and it may be wrong, now. I don't know.

So this means to perhaps try out the simulator or, if
possible, to use an actual emulation through a JTAG port and
see what actually transpires.

Can you do that test?

Jon


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Posted by: Jon Kirwan <[email protected]>
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Posted by: "Redd, Emmett R" <[email protected]>
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