CVS: libraries/include/mspgcc fll.h,1.1,1.2
Chris Liechti <[email protected]>
| Newsgroups | gmane.comp.hardware.texas-instruments.msp430.gcc.cvs |
|---|---|
| Message-ID | <[email protected]> |
Update of /cvsroot/mspgcc/libraries/include/mspgcc In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv21802/libraries/include/mspgcc Modified Files: fll.h Log Message: fix docs Index: fll.h =================================================================== RCS file: /cvsroot/mspgcc/libraries/include/mspgcc/fll.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -w -d -r1.1 -r1.2 --- fll.h 22 Aug 2005 11:24:00 -0000 1.1 +++ fll.h 29 Sep 2005 19:07:11 -0000 1.2 @@ -30,7 +30,8 @@ * * Example, setting the CPU to 3 MHz based on a watch crystal (32.768 kHz): * - * BCSCTL2 = DIVS_DIV4; // select 8192 Hz from XT1 + * BCSCTL1 = XT2OFF|RSEL2|DIVA_DIV4; // select 8192 Hz from XT1 + * BCSCTL2 = 0; * delay(0xffff); // give osillator some time to settle * fll_adjust(FLL_MULTIPLIER(3000000, 8192)); //adjust frequency * ------------------------------------------------------- This SF.Net email is sponsored by: Power Architecture Resource Center: Free content, downloads, discussions, and more. http://solutions.newsforge.com/ibmarch.tmpl