CVS: jtag/funclets ramsizeDetect.S,NONE,1.1 ihex2c.py,1.6,1.7 makefile,1.4,1.5 msp430xRAM.x,1.1,1.2

Update of /cvsroot/mspgcc/jtag/funclets
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv29222/jtag/funclets

Modified Files:
	ihex2c.py makefile msp430xRAM.x 
Added Files:
	ramsizeDetect.S 
Log Message:
- improve build (nicer makefile, fixed linker script warnings)
- add new funclet that (should) detect the available RAM the MSP430 it's run on

--- NEW FILE: ramsizeDetect.S ---
/* Detect the RAM size by probing

Usage:

    msp430-jtag --result=r15 --funclet ramsizeDetect.a43

This programm must be linked specialy so that it's placed in the RAM.
(see makefile).
The first six bytes and its contents are mandatory. Also must the funclet
end with a "jmp $" instruction.

chris <[email protected]>
*/

#include <io.h>

.text
start:  .word   start                   ; target address to download in MSP430
        .word   main                    ; staring address of code
        .word   stop                    ; end address, where the "jmp $" is located

main:   
        ; some devices, e.g. the F123 have the RAM mirrored each 256 bytes
        ; so the check below will succeed despite that the RAM is not realy that
        ; large (actualy it will not succeed for many values as the programm
        ; itself is beeing overwritten...)
        mov     #0x0300, r15
        clr     @r15                    ; try to clear 0x300 (and also 0x200 if the memory is mirorred...)
        cmp     @r15, -0x0100(r15)      ; compare 0x200 and 0x300
        jeq     done                    ; same -> mirrored after 256 bytes
        
        ; scan RAM by writting and checking witrh a pattern
        mov     #0x0280, r15            ; start probing at 128 bytes
        mov     #0x12a5, r10            ; this is the pattern
        mov     r10, r11
        rra     r11                     ; and the shifted pattern
        
.Lloop: mov     r10, 0(r15)             ; write pattern to current address
        mov     #0xffff, 2(r15)         ; dummy write so that the data bus contains a different value
        rra     0(r15)                  ; modify RAM
        mov     #0, -2(r15)             ; dummy write so that the data bus contains a different value
        cmp     @r15, r11               ; compare value to the expected one
        jne     done                    ; values differ -> no RAM here
        add     #32, r15                ; test next address (advance fast, no need to check every word)
        cmp     #0x0a00, r15            ; do not scan further
        jlo     .Lloop
error:  clr     r15                     ; error, size could not be detected, return 0
        jmp     stop
        
done:   sub     #0x0200, r15            ; calculate RAM size by subtracting start offset

stop:   jmp     stop                    ; end of program, detected by library

Index: ihex2c.py
===================================================================
RCS file: /cvsroot/mspgcc/jtag/funclets/ihex2c.py,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -w -d -r1.6 -r1.7
--- ihex2c.py	22 Dec 2005 01:49:34 -0000	1.6
+++ ihex2c.py	23 Dec 2005 02:25:42 -0000	1.7
@@ -2,11 +2,11 @@
 """
 Convert Intel HEX files to C code to embed
 
-USAGE: ihex2c.py input.a43 outname [const]
+USAGE: ihex2c.py input.a43 outname.ci [const]
 
 This generates a file named "outname.ci" which contains an array
-named "unsigned short funclet_outname[]". That array contains the
-machine code from the input file.
+named "unsigned short funclet_outname[]" (extension is stripped off).
+That array contains the machine code from the input file.
 
 The optional argument "const" changes the array type to "const
 unsigned short" if present.
@@ -23,7 +23,8 @@
 
 import sys
 
-VERSION = "1.0"
+
+VERSION = "1.1"
 
 #for the use with memread
 def hexdump( (adr, memstr) ):
@@ -161,13 +162,16 @@
                     fromadr = fromadr + 1 #adjust start
         return res
 
+
 def main():
+    import os.path
 
     if len(sys.argv) < 3:
         sys.stderr.write(__doc__)
         sys.exit(2)
     filename = sys.argv[1]
     outname  = sys.argv[2]
+    varname = os.path.splitext(outname)[0]
 
     opts = sys.argv[3:]
 
@@ -181,14 +185,14 @@
         sys.stderr.write("a file with exactly one segment is required!\n")
         sys.exit(1)
         
-    output = open(outname+".ci", "w")
+    output = open(outname, "w")
     bytes = 0
     for seg in mem:
         hexdump((seg.startaddress, seg.data))
         bytes = bytes + len(seg.data)
         if 'const' in opts:
             output.write("const ")
-        output.write("unsigned short funclet_%s[] = {\n\t" % outname)
+        output.write("unsigned short funclet_%s[] = {\n\t" % varname)
         output.write(',\n\t'.join([("0x%04x" % (ord(seg.data[i]) + (ord(seg.data[i+1])<<8)))
                         for i in range(0,len(seg.data),2)]))
         output.write("\n};\n")

Index: makefile
===================================================================
RCS file: /cvsroot/mspgcc/jtag/funclets/makefile,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -w -d -r1.4 -r1.5
--- makefile	22 Dec 2005 01:49:35 -0000	1.4
+++ makefile	23 Dec 2005 02:25:42 -0000	1.5
@@ -12,8 +12,13 @@
 
 .PHONY: all clean convert FORCE
 
+
 #a list of funclets for the default target "all"
-all: regtest.a43 blinking.a43 eraseFlash.a43 eraseFlashSegment.a43 progFlash.a43 eraseFlash.lst eraseFlashSegment.lst progFlash.lst convert
+all: eraseFlash.ci eraseFlash.lst \
+     eraseFlashSegment.ci eraseFlashSegment.lst \
+     progFlash.ci progFlash.lst \
+     ramsizeDetect.ci ramsizeDetect.lst \
+     #~ regtest.a43 blinking.a43
 
 #pattern rule for funclets
 #msp430-ld is used to link and NO libraries are linked!
@@ -31,12 +36,14 @@
 	msp430-objdump >$@ -DS $<
 
 #convert intel hex/a43 files to includable C files
-convert: eraseFlash.a43 progFlash.a43 eraseFlashSegment.a43
-	python ihex2c.py eraseFlash.a43 eraseFlash
-	python ihex2c.py eraseFlashSegment.a43 eraseFlashSegment
-	python ihex2c.py progFlash.a43 progFlash
+%.ci: %.a43
+	python ihex2c.py $< $@
+
 
 #clean (some) files generated during compilation
 clean:
-	rm -f *.o *.elf
+	rm -f eraseFlash.ci eraseFlash.lst \
+     eraseFlashSegment.ci eraseFlashSegment.lst \
+     progFlash.ci progFlash.lst \
+     ramsizeDetect.a43 ramsizeDetect.lst
 

Index: msp430xRAM.x
===================================================================
RCS file: /cvsroot/mspgcc/jtag/funclets/msp430xRAM.x,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -w -d -r1.1 -r1.2
--- msp430xRAM.x	24 Sep 2002 02:03:02 -0000	1.1
+++ msp430xRAM.x	23 Dec 2005 02:25:42 -0000	1.2
@@ -105,13 +105,6 @@
     . = ALIGN(2);
     *(.bootloader.*)
   }  > bootloader
-  /* Information memory */
-  .infomem   :
-  {
-    *(.infomem)
-    . = ALIGN(2);
-    *(.infomem.*)
-  }  > infomem
   .bss  SIZEOF(.data) + ADDR(.data) :
   {
      PROVIDE (__bss_start = .) ; 
@@ -120,13 +113,6 @@
      PROVIDE (__bss_end = .) ; 
      _end = . ;  
   }  > data
-  .vectors  :
-/*	AT (ADDR (.text) + SIZEOF (.text) + SIZEOF (.data)) */
-  {
-     PROVIDE (__vectors_start = .) ; 
-    *(.vectors*)
-     _vectors_end = . ; 
-  }  > vectors
   /* Stabs debugging sections.  */
   .stab 0 : { *(.stab) } 
   .stabstr 0 : { *(.stabstr) }



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