CVS: msp430-libc/include/msp430 lcd_a.h,1.1,1.2
Steve Underwood <[email protected]>
| Newsgroups | gmane.comp.hardware.texas-instruments.msp430.gcc.cvs |
|---|---|
| Message-ID | <[email protected]> |
Update of /cvsroot/mspgcc/msp430-libc/include/msp430 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv10355/msp430-libc/include/msp430 Modified Files: lcd_a.h Log Message: Fixed some missing semi-colons Index: lcd_a.h =================================================================== RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430/lcd_a.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -w -d -r1.1 -r1.2 --- lcd_a.h 11 Mar 2005 15:49:50 -0000 1.1 +++ lcd_a.h 24 Jan 2006 00:10:34 -0000 1.2 @@ -15,7 +15,7 @@ /* Switches: none */ #define LCDACTL_ 0x0090 /* LCD_A Control Register */ -sfrb(LCDACTL, LCDACTL_) +sfrb(LCDACTL, LCDACTL_); #define LCDON 0x01 #define LCDSON 0x04 #define LCDMX0 0x08 @@ -41,7 +41,7 @@ #define LCDFREQ_512 (7<<5) /* LCD Freq: ACLK divided by 512 */ #define LCDAPCTL0_ 0x00AC /* LCD_A Port Control Register 0 */ -sfrb(LCDAPCTL0, LCDAPCTL0_) +sfrb(LCDAPCTL0, LCDAPCTL0_); #define LCDS0 0x01 /* LCD Segment 0 to 3 Enable. */ #define LCDS4 0x02 /* LCD Segment 4 to 7 Enable. */ #define LCDS8 0x04 /* LCD Segment 8 to 11 Enable. */ @@ -52,12 +52,12 @@ #define LCDS28 0x80 /* LCD Segment 28 to 31 Enable. */ #define LCDAPCTL1_ 0x00AD /* LCD_A Port Control Register 1 */ -sfrb(LCDAPCTL1, LCDAPCTL1_) +sfrb(LCDAPCTL1, LCDAPCTL1_); #define LCDS32 0x01 /* LCD Segment 32 to 35 Enable. */ #define LCDS36 0x02 /* LCD Segment 36 to 39 Enable. */ #define LCDAVCTL0_ 0x00AE /* LCD_A Voltage Control Register 0 */ -sfrb(LCDAVCTL0, LCDAVCTL0_) +sfrb(LCDAVCTL0, LCDAVCTL0_); #define LCD2B 0x01 /* Selects 1/2 bias. */ #define VLCDREF0 0x02 /* Selects reference voltage for regulated charge pump: 0 */ #define VLCDREF1 0x04 /* Selects reference voltage for regulated charge pump: 1 */ @@ -67,7 +67,7 @@ #define LCDR03EXT 0x40 /* Selects external connection for lowest LCD voltage. */ #define LCDAVCTL1_ 0x00AF /* LCD_A Voltage Control Register 1 */ -sfrb(LCDAVCTL1, LCDAVCTL1_) +sfrb(LCDAVCTL1, LCDAVCTL1_); #define VLCD0 0x02 /* VLCD select: 0 */ #define VLCD1 0x04 /* VLCD select: 1 */ #define VLCD2 0x08 /* VLCD select: 2 */ ------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Do you grep through log files for problems? Stop! Download the new AJAX search engine that makes searching your log files as easy as surfing the web. DOWNLOAD SPLUNK! http://sel.as-us.falkag.net/sel?cmd=lnk&kid=103432&bid=230486&dat=121642