CVS: msp430-libc/include/msp430 basic_timer.h,1.2,1.3 lcd_a.h,1.2,1.3
Steve Underwood <[email protected]>
| Newsgroups | gmane.comp.hardware.texas-instruments.msp430.gcc.cvs |
|---|---|
| Message-ID | <[email protected]> |
Update of /cvsroot/mspgcc/msp430-libc/include/msp430 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv31112/msp430-libc/include/msp430 Modified Files: basic_timer.h lcd_a.h Log Message: Additional basic timer features, and missing stuff added to LCD A Index: basic_timer.h =================================================================== RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430/basic_timer.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -w -d -r1.2 -r1.3 --- basic_timer.h 28 Dec 2002 06:56:48 -0000 1.2 +++ basic_timer.h 25 Jan 2006 16:39:10 -0000 1.3 @@ -1,4 +1,3 @@ - #ifndef __msp430_headers_basic_timer_h #define __msp430_headers_basic_timer_h @@ -13,7 +12,10 @@ * $Id$ */ -/* Switches: none */ +/* Switches: +__MSP430_HAS_BT_RTC__ - if device has the enhanced BT with RTC + +*/ #define BTCTL_ 0x0040 /* Basic Timer Control */ sfrb(BTCTL,BTCTL_); @@ -103,6 +105,71 @@ #define BTHOLD_CNT1 (BTHOLD) /* BTCNT1 is held while BTHOLD is set */ #define BTHOLD_CNT1_2 (BTHOLD|BTDIV) /* BT1CNT1 .AND. BT1CNT2 are held while ~ is set */ +#if defined(__MSP430_HAS_BT_RTC__) + +#define RTCCTL_ 0x0041 /* Real Time Clock Control */ +sfrb(RTCCTL, RTCCTL_); +#define RTCNT1_ 0x0042 /* Real Time Counter 1 */ +sfrb(RTCNT1, RTCNT1_); +#define RTCNT2_ 0x0043 /* Real Time Counter 2 */ +sfrb(RTCNT2, RTCNT2_); +#define RTCNT3_ 0x0044 /* Real Time Counter 3 */ +sfrb(RTCNT3, RTCNT3_); +#define RTCNT4_ 0x0045 /* Real Time Counter 4 */ +sfrb(RTCNT4, RTCNT4_); +#define BTCNT1_ 0x0046 /* Basic Timer Count 1 */ +sfrb(BTCNT1, BTCNT1_); +#define BTCNT2_ 0x0047 /* Basic Timer Count 2 */ +sfrb(BTCNT2, BTCNT2_); +#define RTCDAY_ 0x004C /* Real Time Clock Day */ +sfrb(RTCDAY, RTCDAY_); +#define RTCMON_ 0x004D /* Real Time Clock Month */ +sfrb(RTCMON, RTCMON_); +#define RTCYEARL_ 0x004E /* Real Time Clock Year (Low Byte) */ +sfrb(RTCYEARL, RTCYEARL_); +#define RTCYEARH_ 0x004F /* Real Time Clock Year (High Byte) */ +sfrb(RTCYEARH, RTCYEARH_); + +#define RTCSEC RTCNT1 +#define RTCMIN RTCNT2 +#define RTCHOUR RTCNT3 +#define RTCDOW RTCNT4 + +#define RTCTL_ 0x0040 /* Basic/Real Timer Control */ +sfrb(RTCTL, RTCTL_); + +#define RTCTIM0 RTCNT12 +#define RTCTIM1 RTCNT34 + +#define BTSSEL (0x80) /* fBT = fMCLK (main clock) */ +#define BTHOLD (0x40) /* BT1 is held if this bit is set */ +#define BTDIV (0x20) /* fCLK2 = ACLK:256 */ +//#define res (0x10) +//#define res (0x08) +#define BTIP2 (0x04) +#define BTIP1 (0x02) +#define BTIP0 (0x01) + +#define RTCBCD (0x80) /* RTC BCD Select */ +#define RTCHOLD (0x40) /* RTC Hold */ +#define RTCMODE1 (0x20) /* RTC Mode 1 */ +#define RTCMODE0 (0x10) /* RTC Mode 0 */ +#define RTCTEV1 (0x08) /* RTC Time Event 1 */ +#define RTCTEV0 (0x04) /* RTC Time Event 0 */ +#define RTCIE (0x02) /* RTC Interrupt Enable */ +#define RTCFG (0x01) /* RTC Event Flag */ + +#define RTCTEV_0 (0<<2) /* RTC Time Event: 0 */ +#define RTCTEV_1 (1<<2) /* RTC Time Event: 1 */ +#define RTCTEV_2 (2<<2) /* RTC Time Event: 2 */ +#define RTCTEV_3 (3<<2) /* RTC Time Event: 3 */ +#define RTCMODE_0 (0<<4) /* RTC Mode: 0 */ +#define RTCMODE_1 (1<<4) /* RTC Mode: 1 */ +#define RTCMODE_2 (2<<4) /* RTC Mode: 2 */ +#define RTCMODE_3 (3<<4) /* RTC Mode: 3 */ + +#endif + /* INTERRUPT CONTROL BITS */ /* #define BTIE 0x80 */ /* #define BTIFG 0x80 */ Index: lcd_a.h =================================================================== RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430/lcd_a.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -w -d -r1.2 -r1.3 --- lcd_a.h 24 Jan 2006 00:10:34 -0000 1.2 +++ lcd_a.h 25 Jan 2006 16:39:10 -0000 1.3 @@ -66,6 +66,12 @@ #define LCDREXT 0x20 /* Selects external connections for LCD mid voltages. */ #define LCDR03EXT 0x40 /* Selects external connection for lowest LCD voltage. */ +/* Reference voltage source select for the regulated charge pump */ +#define VLCDREF_0 (0<<1) /* Internal */ +#define VLCDREF_1 (1<<1) /* External */ +#define VLCDREF_2 (2<<1) /* Reserved */ +#define VLCDREF_3 (3<<1) /* Reserved */ + #define LCDAVCTL1_ 0x00AF /* LCD_A Voltage Control Register 1 */ sfrb(LCDAVCTL1, LCDAVCTL1_); #define VLCD0 0x02 /* VLCD select: 0 */ @@ -73,6 +79,41 @@ #define VLCD2 0x08 /* VLCD select: 2 */ #define VLCD3 0x10 /* VLCD select: 3 */ +/* Charge pump voltage selections */ +#define VLCD_0 (0<<1) /* Charge pump disabled */ +#define VLCD_1 (1<<1) /* VLCD = 2.60V */ +#define VLCD_2 (2<<1) /* VLCD = 2.66V */ +#define VLCD_3 (3<<1) /* VLCD = 2.72V */ +#define VLCD_4 (4<<1) /* VLCD = 2.78V */ +#define VLCD_5 (5<<1) /* VLCD = 2.84V */ +#define VLCD_6 (6<<1) /* VLCD = 2.90V */ +#define VLCD_7 (7<<1) /* VLCD = 2.96V */ +#define VLCD_8 (8<<1) /* VLCD = 3.02V */ +#define VLCD_9 (9<<1) /* VLCD = 3.08V */ +#define VLCD_10 (10<<1) /* VLCD = 3.14V */ +#define VLCD_11 (11<<1) /* VLCD = 3.20V */ +#define VLCD_12 (12<<1) /* VLCD = 3.26V */ +#define VLCD_13 (12<<1) /* VLCD = 3.32V */ +#define VLCD_14 (13<<1) /* VLCD = 3.38V */ +#define VLCD_15 (15<<1) /* VLCD = 3.44V */ + +#define VLCD_DISABLED (0<<1) /* Charge pump disabled */ +#define VLCD_2_60 (1<<1) /* VLCD = 2.60V */ +#define VLCD_2_66 (2<<1) /* VLCD = 2.66V */ +#define VLCD_2_72 (3<<1) /* VLCD = 2.72V */ +#define VLCD_2_78 (4<<1) /* VLCD = 2.78V */ +#define VLCD_2_84 (5<<1) /* VLCD = 2.84V */ +#define VLCD_2_90 (6<<1) /* VLCD = 2.90V */ +#define VLCD_2_96 (7<<1) /* VLCD = 2.96V */ +#define VLCD_3_02 (8<<1) /* VLCD = 3.02V */ +#define VLCD_3_08 (9<<1) /* VLCD = 3.08V */ +#define VLCD_3_14 (10<<1) /* VLCD = 3.14V */ +#define VLCD_3_20 (11<<1) /* VLCD = 3.20V */ +#define VLCD_3_26 (12<<1) /* VLCD = 3.26V */ +#define VLCD_3_32 (12<<1) /* VLCD = 3.32V */ +#define VLCD_3_38 (13<<1) /* VLCD = 3.38V */ +#define VLCD_3_44 (15<<1) /* VLCD = 3.44V */ + #define LCDMEM_ LCD_BASE+1 /* LCD memory */ #ifdef _GNU_ASSEMBLER_ #define LCDMEM LCDMEM_ /* LCD memory (for assembler) */ ------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. 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