CVS: python msp430-dco.py,1.5,1.6 msp430-jtag.py,1.21,1.22

Update of /cvsroot/mspgcc/python
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv31475/python

Modified Files:
	msp430-dco.py msp430-jtag.py 
Log Message:
- library backend can be enforced
- change search strategy (use bin/lib for 3'rd party MSP430.dll)
- msp430-dco fixes (no messages in case of failre), enfore use of MSP430mspgcc lib
- fix --upload size

Index: msp430-dco.py
===================================================================
RCS file: /cvsroot/mspgcc/python/msp430-dco.py,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -w -d -r1.5 -r1.6
--- msp430-dco.py	2 Feb 2006 00:01:19 -0000	1.5
+++ msp430-dco.py	4 Apr 2006 21:58:10 -0000	1.6
@@ -53,6 +53,7 @@
     if tolerance < 0.005 or tolerance > 50:
         raise ValueError('tolerance out of range %f' % (tolerance,))
     device = get_msp430_type() >> 8
+    
     if device == 0xf1:
         measured_frequency, dco, bcs1 = clock.setDCO(
             frequency*(1-tolerance),
@@ -66,16 +67,16 @@
             out.write('#define DCOCTL%s 0x%02x\n' % (suffix, dco,))
             out.write('#define BCSCTL1%s 0x%02x\n' % (suffix, bcs1,))
             if dcor:
-                out.write('#define BCSCTL2%s 0x01 //select external RSOC\n' % (suffix,))
+                out.write('#define BCSCTL2%s 0x01 // select external ROSC\n' % (suffix,))
             else:
-                out.write('#define BCSCTL2%s 0x00 //select internal RSOC\n' % (suffix,))
+                out.write('#define BCSCTL2%s 0x00 // select internal ROSC\n' % (suffix,))
         else:
             out.write('DCOCTL = 0x%02x;\n' % (dco,))
             out.write('BCSCTL1 = 0x%02x;\n' % (bcs1,))
             if dcor:
-                out.write('BCSCTL2 = 0x01; //select external RSOC\n')
+                out.write('BCSCTL2 = 0x01; // select external ROSC\n')
             else:
-                out.write('BCSCTL2 = 0x00; //select internal RSOC\n')
+                out.write('BCSCTL2 = 0x00; // select internal ROSC\n')
     elif device == 0xf2:
         measured_frequency, dco, bcs1 = clock.setDCO(
             frequency*(1-tolerance),
@@ -89,17 +90,17 @@
             out.write('#define DCOCTL%s 0x%02x\n' % (suffix, dco,))
             out.write('#define BCSCTL1%s 0x%02x\n' % (suffix, bcs1,))
             if dcor:
-                out.write('#define BCSCTL2%s 0x01 //select external RSOC\n' % (suffix,))
+                out.write('#define BCSCTL2%s 0x01 // select external ROSC\n' % (suffix,))
             else:
-                out.write('#define BCSCTL2%s 0x00 //select internal RSOC\n' % (suffix,))
+                out.write('#define BCSCTL2%s 0x00 // select internal ROSC\n' % (suffix,))
             out.write('#define BCSCTL3%s 0x00\n' % (suffix,))
         else:
             out.write('DCOCTL = 0x%02x;\n' % (dco,))
             out.write('BCSCTL1 = 0x%02x;\n' % (bcs1,))
             if dcor:
-                out.write('BCSCTL2 = 0x01; //select external RSOC\n')
+                out.write('BCSCTL2 = 0x01; // select external ROSC\n')
             else:
-                out.write('BCSCTL2 = 0x00; //select internal RSOC\n')
+                out.write('BCSCTL2 = 0x00; // select internal ROSC\n')
             out.write('BCSCTL3 = 0x00;\n')
     elif device == 0xf4:
         measured_frequency, scfi0, scfi1, scfqctl, fll_ctl0, fll_ctl1 = clock.setDCOPlus(
@@ -120,43 +121,45 @@
                 scfi0, scfi1, scfqctl, fll_ctl0, fll_ctl1
             ))
     else:
-        IOError("unknown MSP430 type %02x" % device)
+        raise IOError("unknown MSP430 type %02x" % device)
 
 def measure_clock(out):
     """measure fmin and fmax"""
     device = get_msp430_type() >> 8
+    f_all_max = 0
+    f_all_min = 1e99
     if device == 0xf1:
         for rsel in range(8):
             fmin = clock.getDCOFreq(0x00, rsel)
             fmax = clock.getDCOFreq(0xff, rsel)
-            out.write('%s < f(rsel_%d) < %s\n' % (
+            out.write('%s <= f(rsel_%d) <= %s\n' % (
                 nice_frequency(fmin),
                 rsel,
                 nice_frequency(fmax)
             ))
-        fmin = clock.getDCOFreq(0, 0)
-        fmax = clock.getDCOFreq(0xff, 0x07)
+            f_all_max = max(fmax, f_all_max)
+            f_all_min = min(fmin, f_all_min)
     elif device == 0xf2:
         for rsel in range(16):
             fmin = clock.getDCOFreq(0x00, rsel)
             fmax = clock.getDCOFreq(0xff, rsel)
-            out.write('%s < f(rsel_%d) < %s\n' % (
+            out.write('%s <= f(rsel_%d) <= %s\n' % (
                 nice_frequency(fmin),
                 rsel,
                 nice_frequency(fmax)
             ))
-        fmin = clock.getDCOFreq(0, 0)
-        fmax = clock.getDCOFreq(0xff, 0x0f)
+            f_all_max = max(fmax, f_all_max)
+            f_all_min = min(fmin, f_all_min)
     elif device == 0xf4:
-        fmin = clock.getDCOPlusFreq(0, 0, 0x80, 0x80, 0)
+        f_all_min = clock.getDCOPlusFreq(0, 0, 0x80, 0x80, 0)
         #XXX the F4xx has clock settings that go higher, but not all are valid
         #for the CPU
         #~ fmax = getDCOPlusFreq(0x03, 0xff, 0x80, 0x80, 0) # should be around 6MHz
-        fmax = clock.getDCOPlusFreq(0x13, 0xbf, 0x80, 0x80, 0) # should be around 16MHz
+        f_all_max = clock.getDCOPlusFreq(0x13, 0xbf, 0x80, 0x80, 0) # should be around 16MHz
     else:
-        IOError("unknown MSP430 type %02x" % device)
-    out.write('fmin = %8dHz (%s)\n' % (fmin, nice_frequency(fmin)))
-    out.write('fmax = %8dHz (%s)\n' % (fmax, nice_frequency(fmax)))
+        raise IOError("unknown MSP430 type %02x" % device)
+    out.write('fmin = %8dHz (%s)\n' % (fmin, nice_frequency(f_all_min)))
+    out.write('fmax = %8dHz (%s)\n' % (fmax, nice_frequency(f_all_max)))
 
 
 calibvalues_memory_map = {
@@ -215,12 +218,13 @@
     See min and max clock speeds:
         %prog --measure
 
-    Get clock settings for 2.0MHz +/-2%:
-        %prog --tolerance=0.02 2.0e6
+    Get clock settings for 2.0MHz +/-1%:
+        %prog --tolerance=0.01 2.0e6
     
 Use it at your own risk. No guarantee that the values are correct.""")
     parser.add_option("-o", "--output", dest="output",
-                      help="write result to given file", metavar="FILE")
+                      help="write result to given file", metavar="FILE",
+                      default=None)
     parser.add_option("", "--dcor", dest="dcor",
                       help="use external resistor",
                       default=False, action='store_true')
@@ -231,17 +235,17 @@
                       help="set the parallel port",
                       default=None)
 
-    parser.add_option("", "--measure", dest="measure",
+    parser.add_option("-m", "--measure", dest="measure",
                       help="measure min and max clock settings and exit",
                       default=False, action="store_true")
 
 
-    parser.add_option("", "--calibrate", dest="calibrate",
+    parser.add_option("-c", "--calibrate", dest="calibrate",
                       help="Restore calibration values on F2xx devices",
                       default=False, action="store_true")
                       
     parser.add_option("-t", "--tolerance", dest="tolerance",
-                      help="set the clock tolerance as factor. e.g. 0.01 means 1%",
+                      help="set the clock tolerance as factor. e.g. 0.01 means 1% (default=0.005)",
                       default=0.005, type="float")
 
     parser.add_option("", "--define", dest="define",
@@ -256,7 +260,7 @@
 
     if not (options.measure or options.calibrate):
         if len(args) != 1:
-            parser.error('exacly one argument expected: the target frequency')
+            parser.error('exactly one argument expected: the target frequency')
         frequency = float(args[0])
     
     #prepare output
@@ -266,6 +270,7 @@
         out = file(options.output, 'w')
     
     #
+    jtag.init_backend(jtag.CTYPES_MSPGCC)   #doesn't currently work with 3'rd party libs
     jtagobj = jtag.JTAG()
     jtagobj.open(options.lpt)               #try to open port
     jtagobj.connect()                       #try to connect to target

Index: msp430-jtag.py
===================================================================
RCS file: /cvsroot/mspgcc/python/msp430-jtag.py,v
retrieving revision 1.21
retrieving revision 1.22
diff -u -w -d -r1.21 -r1.22
--- msp430-jtag.py	24 Mar 2006 21:16:44 -0000	1.21
+++ msp430-jtag.py	4 Apr 2006 21:58:10 -0000	1.22
@@ -361,6 +361,7 @@
     if DEBUG:   #debug infos
         sys.stderr.write("Debug is level set to %d\n" % DEBUG)
         sys.stderr.write("Python version: %s\n" % sys.version)
+        if DEBUG > 4: sys.stderr.write("Python module path: %s\n" % sys.path)
         sys.stderr.write("JTAG backend: %s\n" % jtag.backend)
 
 
@@ -386,7 +387,7 @@
         sys.exit(2)
     #backwards compatibility for old parameter format
     if not uploadlist and startaddr:
-        uploadlist.append((startaddr, size))
+        uploadlist.append((startaddr, startaddr+size-1))
         
     #prepare data to download
     jtagobj.data = memory.Memory()                      #prepare downloaded data
@@ -476,6 +477,8 @@
                 #sys.stderr.write("Waiting to device for reconnect for upload: ")
             for start, end in uploadlist:
                 size = end - start + 1
+                if DEBUG > 2:
+                    sys.stderr.write("upload 0x%04x %d Bytes\n" % (start, size))
                 data = jtagobj.uploadData(start, size)  #upload data
                 if outputformat == HEX:                 #depending on output format
                     hexdump((start, data))              #print a hex display



-------------------------------------------------------
This SF.Net email is sponsored by xPML, a groundbreaking scripting language
that extends applications into web and mobile media. Attend the live webcast
and join the prime developer group breaking into this new coding territory!
http://sel.as-us.falkag.net/sel?cmd=lnk&kid=110944&bid=241720&dat=121642