CVS: msp430-libc/include iomacros.h,1.32,1.33

Update of /cvsroot/mspgcc/msp430-libc/include
In directory sc8-pr-cvs16.sourceforge.net:/tmp/cvs-serv26836/include

Modified Files:
	iomacros.h 
Log Message:
The constraint "i" for some of the macros was more inflexible than
necessary. It has now been changed to "ir" in each case. More testing
is needed to see if this is really an appropriate change in every case.


Index: iomacros.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/iomacros.h,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -w -d -r1.32 -r1.33
--- iomacros.h	11 Jul 2007 17:38:18 -0000	1.32
+++ iomacros.h	2 Oct 2007 23:44:55 -0000	1.33
@@ -110,11 +110,11 @@
 	__x; \
 })
 
-#define _BIS_SR(x)              __asm__ __volatile__("bis	%0, r2" : : "i" ((uint16_t) x))
-#define _BIC_SR(x)              __asm__ __volatile__("bic	%0, r2" : : "i" ((uint16_t) x))
+#define _BIS_SR(x)              __asm__ __volatile__("bis	%0, r2" : : "ir" ((uint16_t) x))
+#define _BIC_SR(x)              __asm__ __volatile__("bic	%0, r2" : : "ir" ((uint16_t) x))
 
-#define __bis_SR_register(x)    __asm__ __volatile__("bis	%0, r2" : : "i" ((uint16_t) x))
-#define __bic_SR_register(x)    __asm__ __volatile__("bic	%0, r2" : : "i" ((uint16_t) x))
+#define __bis_SR_register(x)    __asm__ __volatile__("bis	%0, r2" : : "ir" ((uint16_t) x))
+#define __bic_SR_register(x)    __asm__ __volatile__("bic	%0, r2" : : "ir" ((uint16_t) x))
 
 #if __GNUC_MINOR__ >= 4
 
@@ -136,25 +136,25 @@
 #define _BIS_SR_IRQ(x) \
     __asm__ __volatile__ ( \
         "bis %0, .L__FrameOffset_" __FUNCTION__ "(r1)" \
-        : : "i" ((uint16_t) x) \
+        : : "ir" ((uint16_t) x) \
     )
 
 #define _BIC_SR_IRQ(x) \
     __asm__ __volatile__ ( \
         "bic %0, .L__FrameOffset_" __FUNCTION__ "(r1)" \
-        : : "i" ((uint16_t) x) \
+        : : "ir" ((uint16_t) x) \
     )
 
 #define __bis_SR_register_on_exit(x) \
     __asm__ __volatile__ ( \
         "bis %0, .L__FrameOffset_" __FUNCTION__ "(r1)" \
-        : : "i" ((uint16_t) x) \
+        : : "ir" ((uint16_t) x) \
     )
 
 #define __bic_SR_register_on_exit(x) \
     __asm__ __volatile__ ( \
         "bic %0, .L__FrameOffset_" __FUNCTION__ "(r1)" \
-        : : "i" ((uint16_t) x) \
+        : : "ir" ((uint16_t) x) \
     )
 
 #define GET_FRAME_ADDR(name) \
@@ -239,7 +239,7 @@
 	volatile uint8_t *__x = (uint8_t *) addr; \
 	__asm__ __volatile__("mov.b\t%1, %0" \
 		: "=m" ((uint8_t) *__x) \
-		:  "ri" ((uint8_t) val)); \
+		:  "ir" ((uint8_t) val)); \
 })
 		
 #define READ_PERIPHERAL_REGISTER(addr) \
@@ -256,7 +256,7 @@
 	"and	%A2, %0" \
 	: "=r" (__t) \
 	: "mr" (v), \
-	  "i"   (i) \
+	  "ir"   (i) \
 	); \
 	__t; \
 })
@@ -269,7 +269,7 @@
 	"and	%B2, %0" \
 	: "=r" (__t) \
 	: "mr" (v), \
-	  "i"   (i) \
+	  "ir"   (i) \
 	); \
 	__t; \
 })
@@ -282,7 +282,7 @@
 	"and	%A2, %0" \
 	: "=r" (__t) \
 	: "m" (v), \
-	  "i"   (i) \
+	  "ir"   (i) \
 	); \
 	__t; \
 })
@@ -295,7 +295,7 @@
 	"and	%B2, %0" \
 	: "=r" (__t) \
 	: "m" (v), \
-	  "i"   (i) \
+	  "ir"   (i) \
 	); \
 	__t; \
 })


-------------------------------------------------------------------------
This SF.net email is sponsored by: Microsoft
Defy all challenges. Microsoft(R) Visual Studio 2005.
http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/