CVS: msp430-libc/include/msp430 dma.h,1.7,1.8

Update of /cvsroot/mspgcc/msp430-libc/include/msp430
In directory 23jxhf1.ch3.sourceforge.com:/tmp/cvs-serv6644/msp430

Modified Files:
	dma.h 
Log Message:
dma-related headers fixes:
 - DMAIV added to dma.h, 261x, G461
 - ADC12 rudiments removed from dma.h
 - DMA & DAC12 removed from 241x
 - DMA selection #define fixed in G43x


Index: dma.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430/dma.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -w -d -r1.7 -r1.8
--- dma.h	11 Jul 2007 17:38:19 -0000	1.7
+++ dma.h	7 Nov 2008 08:28:40 -0000	1.8
@@ -12,12 +12,22 @@
  * $Id$
  */
 
-/* Switches: none */
+/* Switches:
+
+__MSP430_HAS_DMAIV__  - if the device has a DMAIV register
+__MSP430_HAS_DMA_3__  - if module has 16-bit address registers
+__MSP430_HAS_DMAX_3__ - if module has 20-bit address registers (430X core)
+
+ */
 
 #define DMACTL0_             0x0122  /* DMA module control 0 */
 sfrw(DMACTL0,DMACTL0_);
 #define DMACTL1_             0x0124  /* DMA module control 1 */
 sfrw(DMACTL1, DMACTL1_);
+#if defined(__MSP430_HAS_DMAIV__)
+#define DMAIV_               0x0126  /* DMA module interrupt vector word */
+sfrw(DMAIV, DMAIV_);
+#endif
 
 #if defined(__MSP430_HAS_DMA_3__)
 #define DMA0CTL_             0x01E0  /* DMA channel 0 control */
@@ -89,16 +99,6 @@
 sfrw(DMA2SZ, DMA2SZ_);
 #endif
 
-#define SREF_0              (0<<4)
-#define SREF_1              (1<<4)
-#define SREF_2              (2<<4)
-#define SREF_3              (3<<4)
-#define SREF_4              (4<<4)
-#define SREF_5              (5<<4)
-#define SREF_6              (6<<4)
-#define SREF_7              (7<<4)
-#define EOS                 0x80
-
 #define DMA0TSEL0           0x0001  /* DMA channel 0 transfer select bit 0 */
 #define DMA0TSEL1           0x0002  /* DMA channel 0 transfer select bit 1 */
 #define DMA0TSEL2           0x0004  /* DMA channel 0 transfer select bit 2 */


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