CVS: msp430-libc/include/msp430 mpy32.h, 1.2, 1.3 wdt_a.h, 1.1, 1.2

"Sergey A. Borshch" <[email protected]> Mon, 15 Dec 2008 12:48:23 +0000
Newsgroups gmane.comp.hardware.texas-instruments.msp430.gcc.cvs
Message-ID <[email protected]>
Update of /cvsroot/mspgcc/msp430-libc/include/msp430
In directory 23jxhf1.ch3.sourceforge.com:/tmp/cvs-serv11724

Modified Files:
	mpy32.h wdt_a.h 
Log Message:
two errors caused by copy&paste fixed


Index: mpy32.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430/mpy32.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -w -d -r1.2 -r1.3
--- mpy32.h	10 Dec 2008 22:32:12 -0000	1.2
+++ mpy32.h	15 Dec 2008 12:48:20 -0000	1.3
@@ -80,7 +80,7 @@
 #define MPYM_0              (0<<4)      /* Multiply */
 #define MPYM_1              (1<<4)      /* Signed multiply */
 #define MPYM_2              (2<<4)      /* Multiply accumulate */
-#define MPYM_1              (3<<4)      /* Signed multiply accumulate */
+#define MPYM_3              (3<<4)      /* Signed multiply accumulate */
 
 
 #ifndef __ASSEMBLER__

Index: wdt_a.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430/wdt_a.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -w -d -r1.1 -r1.2
--- wdt_a.h	7 Dec 2008 22:45:57 -0000	1.1
+++ wdt_a.h	15 Dec 2008 12:48:20 -0000	1.2
@@ -44,9 +44,9 @@
 #define WDTIS_7             (7<<0)      /* Watchdog timer /2G */
 
 #define WDTSSEL_0           (0<<5)      /* Watchdog clock SMCLK */
-#define WDTSSEL_0           (1<<5)      /* Watchdog clock ACLK */
-#define WDTSSEL_0           (2<<5)      /* Watchdog clock VLOCLK */
-#define WDTSSEL_0           (3<<5)      /* Watchdog clock X_CLK */
+#define WDTSSEL_1           (1<<5)      /* Watchdog clock ACLK */
+#define WDTSSEL_2           (2<<5)      /* Watchdog clock VLOCLK */
+#define WDTSSEL_3           (3<<5)      /* Watchdog clock X_CLK */
 
 /* WDT-interval times [1ms] coded with Bits 0-2 */
 /* WDT is clocked by fMCLK (assumed 1MHz) */


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