CVS: msp430-libc/include/msp430 sd16.h, 1.9, 1.10 tlv.h, 1.1, 1.2 wdt_a.h, 1.4, 1.5
"Sergey A. Borshch" <[email protected]> Sun, 11 Jan 2009 23:11:50 +0000
| Newsgroups | gmane.comp.hardware.texas-instruments.msp430.gcc.cvs |
|---|---|
| Message-ID | <[email protected]> |
Update of /cvsroot/mspgcc/msp430-libc/include/msp430
In directory 23jxhf1.ch3.sourceforge.com:/tmp/cvs-serv19805/msp430
Modified Files:
sd16.h tlv.h wdt_a.h
Log Message:
io.h, msp430x47xx.h:
- msp430x471xx devices added
sd16.h:
- #defines added to set SD16IV and SD16MEMx addresses which are different for 471xx devices.
msp430x20x3.h msp430x42x.h msp430x42x0.h msp430xE42x.h msp430xG42x0.h:
- SD16IV and SD16MEMx base address #defines added
wdt_a.h:
- structured declaration added
tlv.h:
- errors fixed.
Index: sd16.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430/sd16.h,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -w -d -r1.9 -r1.10
--- sd16.h 9 Oct 2008 15:00:14 -0000 1.9
+++ sd16.h 11 Jan 2009 23:11:48 -0000 1.10
@@ -13,6 +13,8 @@
*/
/* Switches:
+__MSP430_SD16IV_BASE__ - SD16IV register address
+__MSP430_SD16MEM_BASE__ - SD16MEM0 register address
__MSP430_HAS_SD16_A__ - the SD16 is the "A" type
__MSP430_HAS_SD16_BUF__ - the SD16(_A) has input buffer and SD16AE reg.
@@ -23,7 +25,7 @@
#define SD16CTL_ 0x0100 /* Sigma Delta ADC 16 Control Register */
sfrw(SD16CTL, SD16CTL_);
-#define SD16IV_ 0x0110 /* SD16 Interrupt Vector Register */
+#define SD16IV_ __MSP430_SD16IV_BASE__ /* SD16 Interrupt Vector Register */
sfrw(SD16IV, SD16IV_);
#if defined(__MSP430_HAS_SD16_A__)
@@ -45,7 +47,7 @@
sfrb(SD16PRE0, SD16PRE0_);
#define SD16CCTL0_ 0x0102 /* SD16 Channel 0 Control Register */
sfrw(SD16CCTL0, SD16CCTL0_);
-#define SD16MEM0_ 0x0112 /* SD16 Channel 0 Conversion Memory */
+#define SD16MEM0_ __MSP430_SD16MEM_BASE__ + 0x00 /* SD16 Channel 0 Conversion Memory */
sfrw(SD16MEM0, SD16MEM0_);
#if defined(__MSP430_HAS_SD16_CH1__)
@@ -55,7 +57,7 @@
sfrb(SD16PRE1, SD16PRE1_);
#define SD16CCTL1_ 0x0104 /* SD16 Channel 1 Control Register */
sfrw(SD16CCTL1, SD16CCTL1_);
-#define SD16MEM1_ 0x0114 /* SD16 Channel 1 Conversion Memory */
+#define SD16MEM1_ __MSP430_SD16MEM_BASE__ + 0x02 /* SD16 Channel 1 Conversion Memory */
sfrw(SD16MEM1, SD16MEM1_);
#endif
@@ -66,7 +68,7 @@
sfrb(SD16PRE2, SD16PRE2_);
#define SD16CCTL2_ 0x0106 /* SD16 Channel 2 Control Register */
sfrw(SD16CCTL2, SD16CCTL2_);
-#define SD16MEM2_ 0x0116 /* SD16 Channel 2 Conversion Memory */
+#define SD16MEM2_ __MSP430_SD16MEM_BASE__ + 0x04 /* SD16 Channel 2 Conversion Memory */
sfrw(SD16MEM2, SD16MEM2_);
#endif
@@ -77,10 +79,43 @@
sfrb(SD16PRE3, SD16PRE3_);
#define SD16CCTL3_ 0x0108 /* SD16 Channel 3 Control Register */
sfrw(SD16CCTL3, SD16CCTL3_);
-#define SD16MEM3_ 0x0118 /* SD16 Channel 3 Conversion Memory */
+#define SD16MEM3_ __MSP430_SD16MEM_BASE__ + 0x06 /* SD16 Channel 3 Conversion Memory */
sfrw(SD16MEM3, SD16MEM3_);
#endif
+#if defined(__MSP430_HAS_SD16_CH4__)
+#define SD16INCTL4_ 0x00B4 /* SD16 Input Control Register Channel 4 */
+sfrb(SD16INCTL4, SD16INCTL4_);
+#define SD16PRE4_ 0x00BC /* SD16 Preload Register Channel 4 */
+sfrb(SD16PRE4, SD16PRE4_);
+#define SD16CCTL4_ 0x010A /* SD16 Channel 4 Control Register */
+sfrw(SD16CCTL4, SD16CCTL4_);
+#define SD16MEM4_ __MSP430_SD16MEM_BASE__ + 0x08 /* SD16 Channel 4 Conversion Memory */
+sfrw(SD16MEM4, SD16MEM4_);
+#endif
+
+#if defined(__MSP430_HAS_SD16_CH5__)
+#define SD16INCTL5_ 0x00B5 /* SD16 Input Control Register Channel 5 */
+sfrb(SD16INCTL5, SD16INCTL5_);
+#define SD16PRE5_ 0x00BD /* SD16 Preload Register Channel 5 */
+sfrb(SD16PRE5, SD16PRE5_);
+#define SD16CCTL5_ 0x010C /* SD16 Channel 5 Control Register */
+sfrw(SD16CCTL5, SD16CCTL5_);
+#define SD16MEM5_ __MSP430_SD16MEM_BASE__ + 0x0A /* SD16 Channel 5 Conversion Memory */
+sfrw(SD16MEM5, SD16MEM5_);
+#endif
+
+#if defined(__MSP430_HAS_SD16_CH6__)
+#define SD16INCTL6_ 0x00B6 /* SD16 Input Control Register Channel 6 */
+sfrb(SD16INCTL6, SD16INCTL6_);
+#define SD16PRE6_ 0x00BE /* SD16 Preload Register Channel 6 */
+sfrb(SD16PRE6, SD16PRE6_);
+#define SD16CCTL6_ 0x010E /* SD16 Channel 6 Control Register */
+sfrw(SD16CCTL6, SD16CCTL6_);
+#define SD16MEM6_ __MSP430_SD16MEM_BASE__ + 0x0C /* SD16 Channel 6 Conversion Memory */
+sfrw(SD16MEM6, SD16MEM6_);
+#endif
+
#if defined(__MSP430_HAS_SD16_A__)
/* SD16AE */
#define SD16AE0 0x0001 /* SD16 External Input Enable 0 */
Index: tlv.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430/tlv.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -w -d -r1.1 -r1.2
--- tlv.h 9 Oct 2008 15:00:14 -0000 1.1
+++ tlv.h 11 Jan 2009 23:11:48 -0000 1.2
@@ -69,9 +69,9 @@
/* Structured declaration */
typedef enum
{
- TAG_DCO_30 = 0x01,
- TAG_ADC12_1 = 0x10,
- TAG_EMPTY = 0xFE,
+ DCO_30_TAG = 0x01,
+ ADC12_1_TAG = 0x10,
+ EMPTY_TAG = 0xFE,
} tlv_tags_t;
@@ -81,14 +81,14 @@
unsigned char length;
struct
{
- unsigned char CAL_DCO_16MHZ;
- unsigned char CAL_BC1_16MHZ;
- unsigned char CAL_DCO_12MHZ;
- unsigned char CAL_BC1_12MHZ;
- unsigned char CAL_DCO_8MHZ;
- unsigned char CAL_BC1_8MHZ;
- unsigned char CAL_DCO_1MHZ;
- unsigned char CAL_BC1_1MHZ;
+ unsigned char DCO_16MHZ;
+ unsigned char BC1_16MHZ;
+ unsigned char DCO_12MHZ;
+ unsigned char BC1_12MHZ;
+ unsigned char DCO_8MHZ;
+ unsigned char BC1_8MHZ;
+ unsigned char DCO_1MHZ;
+ unsigned char BC1_1MHZ;
} value;
} const dco_30_tag_t;
@@ -98,14 +98,14 @@
unsigned char length;
struct
{
- unsigned int CAL_ADC_GAIN_FACTOR;
- unsigned int CAL_ADC_OFFSET;
- unsigned int CAL_ADC_15VREF_FACTOR;
- unsigned int CAL_ADC_15T30;
- unsigned int CAL_ADC_15T85;
- unsigned int CAL_ADC_25VREF_FACTOR;
- unsigned int CAL_ADC_25T30;
- unsigned int CAL_ADC_25T85;
+ unsigned int ADC_GAIN_FACTOR;
+ unsigned int ADC_OFFSET;
+ unsigned int ADC_15VREF_FACTOR;
+ unsigned int ADC_15T30;
+ unsigned int ADC_15T85;
+ unsigned int ADC_25VREF_FACTOR;
+ unsigned int ADC_25T30;
+ unsigned int ADC_25T85;
} value;
} const adc12_1_tag_t;
@@ -115,17 +115,14 @@
unsigned char length;
} const empty_tag_t;
-#ifdef __cplusplus
-extern "C"
-#endif //__cplusplus
struct
{
unsigned int checksum;
- empty_tagd_t empty;
+ empty_tag_t empty;
unsigned int dummy[11];
adc12_1_tag_t adc12_1;
dco_30_tag_t dco_30;
-} const tlv asm("0x10c0");
+} const volatile TLV_bits asm("0x10c0");
#endif // __ASSEMBLER__
#endif /* __msp430_headers_tlv_h */
Index: wdt_a.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430/wdt_a.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -w -d -r1.4 -r1.5
--- wdt_a.h 7 Jan 2009 09:28:57 -0000 1.4
+++ wdt_a.h 11 Jan 2009 23:11:48 -0000 1.5
@@ -94,8 +94,16 @@
#undef __str
#define __xstr(x) __str(x)
#define __str(x) #x
-
-volatile unsigned int WDTCTL asm(__xstr(__MSP430_WDT_A_BASE__ + 0x0C)); /* Watchdog timer control register */
+struct
+{
+ volatile unsigned
+ IS0:3,
+ CNTCL:1,
+ TMSEL:1,
+ SSEL:2,
+ HOLD:1,
+ PW:8
+} const WDTCTL_bits asm(__xstr(__MSP430_WDT_A_BASE__ + 0x0C)); /* Watchdog timer control register */
#endif /* __ASSEMBLER__ */
------------------------------------------------------------------------------
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