CVS: msp430-libc/include msp430x47xx.h,1.4,1.5

Update of /cvsroot/mspgcc/msp430-libc/include
In directory 23jxhf1.ch3.sourceforge.com:/tmp/cvs-serv545/msp430-libc/include

Modified Files:
	msp430x47xx.h 
Log Message:
430x47x3, 430x47x4 vectors table size fix


Index: msp430x47xx.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430x47xx.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -w -d -r1.4 -r1.5
--- msp430x47xx.h	11 Jan 2009 23:11:48 -0000	1.4
+++ msp430x47xx.h	22 Mar 2009 11:37:31 -0000	1.5
@@ -123,10 +123,26 @@
 #define BTIFG               (1<<7)
 
 
-#if defined(__MSP430_47166__) || defined(__MSP430_47176__) || defined(__MSP430_47186__) || defined(__MSP430_47196__) \
-    || defined(__MSP430_47167__) || defined(__MSP430_47177__) || defined(__MSP430_47187__) || defined(__MSP430_47197__)
+#if !defined(__MSP430X__)
+/* __MSP430_47x3__, __MSP430_47x4__ */
+#define BASICTIMER_VECTOR   0       /* 0xFFE0 Basic Timer / RTC */
+#define PORT2_VECTOR        2       /* 0xFFE2 Port 2 */
+#define USCIAB1TX_VECTOR    4       /* 0xFFE4 USCI A1/B1 Transmit */
+#define USCIAB1RX_VECTOR    6       /* 0xFFE6 USCI A1/B1 Receive */
+#define PORT1_VECTOR        8       /* 0xFFE8 Port 1 */
+#define TIMER0_A1_VECTOR    10      /* 0xFFEA Timer A CC1-2, TA */
+#define TIMER0_A0_VECTOR    12      /* 0xFFEC Timer A CC0 */
+#define SD16_VECTOR         14      /* 0xFFEE ADC */
+#define USCIAB0TX_VECTOR    16      /* 0xFFF0 USCI A0/B0 Transmit */
+#define USCIAB0RX_VECTOR    18      /* 0xFFF2 USCI A0/B0 Receive */
+#define WDT_VECTOR          20      /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR  22      /* 0xFFF6 Comparator A */
+#define TIMER0_B1_VECTOR    24      /* 0xFFF8 Timer B CC1-2, TB */
+#define TIMER0_B0_VECTOR    26      /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR          28      /* 0xFFFC Non-maskable */
+#else
+/* __MSP430_471x6__, __MSP430_471x7__ */
 #define DMA_VECTOR          30      /* 0xFFDE DMA */
-#endif
 #define BASICTIMER_VECTOR   32      /* 0xFFE0 Basic Timer / RTC */
 #define PORT2_VECTOR        34      /* 0xFFE2 Port 2 */
 #define USCIAB1TX_VECTOR    36      /* 0xFFE4 USCI A1/B1 Transmit */
@@ -142,6 +158,7 @@
 #define TIMER0_B1_VECTOR    56      /* 0xFFF8 Timer B CC1-2, TB */
 #define TIMER0_B0_VECTOR    58      /* 0xFFFA Timer B CC0 */
 #define NMI_VECTOR          60      /* 0xFFFC Non-maskable */
+#endif
 
 #define TIMERA1_VECTOR      TIMER0_A1_VECTOR
 #define TIMERA0_VECTOR      TIMER0_A0_VECTOR


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