CVS: gcc/gcc-3.3/gcc/config/msp430 msp430.c,1.84,1.85

Update of /cvsroot/mspgcc/gcc/gcc-3.3/gcc/config/msp430
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv27871

Modified Files:
	msp430.c 
Log Message:
allocate internal registers via static buffer to avoid memory conflicts.


Index: msp430.c
===================================================================
RCS file: /cvsroot/mspgcc/gcc/gcc-3.3/gcc/config/msp430/msp430.c,v
retrieving revision 1.84
retrieving revision 1.85
diff -u -w -d -r1.84 -r1.85
--- msp430.c	8 Jul 2004 19:21:09 -0000	1.84
+++ msp430.c	26 Oct 2004 16:12:28 -0000	1.85
@@ -428,6 +428,27 @@
 rtx mpy_rtx, mpys_rtx, mac_rtx, macs_rtx, op2_rtx, reslo_rtx, reshi_rtx,
     sumext_rtx, ressi_rtx;
 
+
+static char __dummy[1024];
+
+rtx
+sym_ref(mode, arg)
+enum machine_mode mode;
+const char *arg;
+{
+  rtx rt;
+  static int i = 0;
+  rt = (rtx) &__dummy[i];
+  i += sizeof(*rt);
+  memset(rt,0,4);
+  PUT_CODE(rt,SYMBOL_REF);
+  PUT_MODE(rt,mode);
+  XSTR(rt,0) = arg;
+
+  return rt;
+}
+
+
 void
 msp430_init_once ()
 {
@@ -444,15 +465,15 @@
   __RESSI	<- not natural 
  *****************************/
 
-  mpy_rtx = gen_rtx_MEM (HImode, gen_rtx_SYMBOL_REF (HImode, "__MPY"));
-  mpys_rtx = gen_rtx_MEM (HImode, gen_rtx_SYMBOL_REF (HImode, "__MPYS"));
-  mac_rtx = gen_rtx_MEM (HImode, gen_rtx_SYMBOL_REF (HImode, "__MAC"));
-  macs_rtx = gen_rtx_MEM (HImode, gen_rtx_SYMBOL_REF (HImode, "__MACS"));
-  op2_rtx = gen_rtx_MEM (HImode, gen_rtx_SYMBOL_REF (HImode, "__OP2"));
-  reslo_rtx = gen_rtx_MEM (HImode, gen_rtx_SYMBOL_REF (HImode, "__RESLO"));
-  reshi_rtx = gen_rtx_MEM (HImode, gen_rtx_SYMBOL_REF (HImode, "__RESHI"));
-  sumext_rtx = gen_rtx_MEM (HImode, gen_rtx_SYMBOL_REF (HImode, "__SUMEXT"));
-  ressi_rtx = gen_rtx_MEM (SImode, gen_rtx_SYMBOL_REF (SImode, "__RESLO"));
+  mpy_rtx = gen_rtx_MEM (HImode, sym_ref (HImode, "__MPY"));
+  mpys_rtx = gen_rtx_MEM (HImode, sym_ref (HImode, "__MPYS"));
+  mac_rtx = gen_rtx_MEM (HImode, sym_ref (HImode, "__MAC"));
+  macs_rtx = gen_rtx_MEM (HImode, sym_ref (HImode, "__MACS"));
+  op2_rtx = gen_rtx_MEM (HImode, sym_ref (HImode, "__OP2"));
+  reslo_rtx = gen_rtx_MEM (HImode, sym_ref (HImode, "__RESLO"));
+  reshi_rtx = gen_rtx_MEM (HImode, sym_ref (HImode, "__RESHI"));
+  sumext_rtx = gen_rtx_MEM (HImode, sym_ref (HImode, "__SUMEXT"));
+  ressi_rtx = gen_rtx_MEM (SImode, sym_ref (SImode, "__RESLO"));
   return;
 }
 
@@ -9151,7 +9172,7 @@
       rtx mult, op1, op2;
       rtvec vec;
       /* prepare 'call' pattern */
-      if (sext)
+      if (sext==1)
 	{
 	  op1 = gen_rtx_SIGN_EXTEND (op0mode, r10);
 	  op2 = gen_rtx_SIGN_EXTEND (op0mode, r12);
@@ -9161,7 +9182,6 @@
 	  op1 = r10;
 	  op2 = r12;
 	}
-
       mult = gen_rtx_MULT (op0mode, op1, op2);
       set = gen_rtx_SET (op0mode, r14, mult);
       vec = gen_rtvec (3, set, clob1, clob2);



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