CVS: msp430-libc/include/msp430 gpio.h,1.2,1.3

Steve Underwood <[email protected]>
Newsgroups gmane.comp.hardware.texas-instruments.msp430.gcc.cvs
Message-ID <[email protected]>
Update of /cvsroot/mspgcc/msp430-libc/include/msp430
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv30371/msp430-libc/include/msp430

Modified Files:
	gpio.h 
Log Message:
Some typos fixed for the 21x1 header, and the port resistor options added to gpio.h


Index: gpio.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430/gpio.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -w -d -r1.2 -r1.3
--- gpio.h	10 Dec 2002 10:46:33 -0000	1.2
+++ gpio.h	10 Aug 2005 12:59:27 -0000	1.3
@@ -1,6 +1,6 @@
 #include <msp430/iostructures.h>
 
-#ifndef __msp430_headers_gpio_h
+#if !defined(__msp430_headers_gpio_h)
 #define __msp430_headers_gpio_h
 
 /* gpio.h
@@ -24,9 +24,19 @@
 __msp430_have_port5 - if device has port 5
 __msp430_have_port6 - if device has port 6
 
+Note: these only make sense if the port itself is present. Also note that
+the port resistor enable registers for ports 3-6 overlap with port 0 registers,
+so any device that has these resistors will not have port 0.
+
+__msp430_have_port1_resistors - if port1 has pull-up/pull-down resistors
+__msp430_have_port2_resistors - if port2 has pull-up/pull-down resistors
+__msp430_have_port3_resistors - if port3 has pull-up/pull-down resistors
+__msp430_have_port4_resistors - if port4 has pull-up/pull-down resistors
+__msp430_have_port5_resistors - if port5 has pull-up/pull-down resistors
+__msp430_have_port6_resistors - if port6 has pull-up/pull-down resistors
 */
 
-#ifdef __msp430_have_port0
+#if defined(__msp430_have_port0)
 #define P0IN_               0x0010  /* Port 0 Input */
 sfrb(P0IN,P0IN_);
 #define P0IN_0              0x01
@@ -96,7 +106,7 @@
 #define P0IE_7              0x80
 #endif
 
-#ifdef __msp430_have_port1
+#if defined(__msp430_have_port1)
 #define P1IN_               0x0020  /* Port 1 Input */
 sfrb (P1IN,P1IN_);
 #define P1OUT_              0x0021  /* Port 1 Output */
@@ -111,9 +121,13 @@
 sfrb (P1IE,P1IE_);
 #define P1SEL_              0x0026  /* Port 1 Selection */
 sfrb (P1SEL,P1SEL_);
+#if defined(__msp430_have_port1_resistors)
+#define P1REN_              0x0027  /* Port 1 Resistor enable */
+sfrb(P1REN,P1REN_);
+#endif
 #endif
 
-#ifdef __msp430_have_port2
+#if defined(__msp430_have_port2)
 #define P2IN_               0x0028  /* Port 2 Input */
 sfrb (P2IN,P2IN_);
 #define P2OUT_              0x0029  /* Port 2 Output */
@@ -128,9 +142,13 @@
 sfrb (P2IE,P2IE_);
 #define P2SEL_              0x002E  /* Port 2 Selection */
 sfrb (P2SEL,P2SEL_);
+#if defined(__msp430_have_port2_resistors)
+#define P2REN_              0x002F  /* Port 2 Resistor enable */
+sfrb(P2REN,P2REN_);
+#endif
 #endif
 
-#ifdef __msp430_have_port3
+#if defiend(__msp430_have_port3)
 #define P3IN_               0x0018  /* Port 3 Input */
 sfrb ( P3IN ,P3IN_);
 #define P3OUT_              0x0019  /* Port 3 Output */
@@ -139,9 +157,13 @@
 sfrb ( P3DIR   ,P3DIR_);
 #define P3SEL_              0x001B  /* Port 3 Selection */
 sfrb ( P3SEL   ,P3SEL_);
+#if defined(__msp430_have_port3_resistors)
+#define P3REN_              0x0010  /* Port 3 Resistor enable */
+sfrb(P3REN,P3REN_);
+#endif
 #endif
 
-#ifdef __msp430_have_port4
+#if defined(__msp430_have_port4)
 #define P4IN_               0x001C  /* Port 4 Input */
 sfrb(P4IN,P4IN_);
 #define P4OUT_              0x001D  /* Port 4 Output */
@@ -150,9 +172,13 @@
 sfrb(P4DIR,P4DIR_);
 #define P4SEL_              0x001F  /* Port 4 Selection */
 sfrb(P4SEL,P4SEL_);
+#if defined(__msp430_have_port4_resistors)
+#define P4REN_              0x0011  /* Port 4 Resistor enable */
+sfrb(P4REN,P4REN_);
+#endif
 #endif
 
-#ifdef __msp430_have_port5
+#if defined(__msp430_have_port5)
 #define P5IN_               0x0030  /* Port 5 Input */
 sfrb(P5IN,P5IN_);
 #define P5OUT_              0x0031  /* Port 5 Output */
@@ -161,9 +187,13 @@
 sfrb(P5DIR,P5DIR_);
 #define P5SEL_              0x0033  /* Port 5 Selection */
 sfrb(P5SEL,P5SEL_);
+#if defined(__msp430_have_port5_resistors)
+#define P5REN_              0x0012  /* Port 5 Resistor enable */
+sfrb(P5REN,P5REN_);
+#endif
 #endif
 
-#ifdef __msp430_have_port6
+#if defined(__msp430_have_port6)
 #define P6IN_               0x0034  /* Port 6 Input */
 sfrb(P6IN,P6IN_);
 #define P6OUT_              0x0035  /* Port 6 Output */
@@ -172,6 +202,10 @@
 sfrb(P6DIR,P6DIR_);
 #define P6SEL_              0x0037  /* Port 6 Selection */
 sfrb(P6SEL,P6SEL_);
+#if defined(__msp430_have_port6_resistors)
+#define P6REN_              0x0013  /* Port 6 Resistor enable */
+sfrb(P6REN,P6REN_);
+#endif
 #endif
 
 #endif



-------------------------------------------------------
SF.Net email is Sponsored by the Better Software Conference & EXPO
September 19-22, 2005 * San Francisco, CA * Development Lifecycle Practices
Agile & Plan-Driven Development * Managing Projects & Teams * Testing & QA
Security * Process Improvement & Measurement * http://www.sqe.com/bsce5sf
lmpx.com only provides a reader for public news (NNTP) servers. It is not affiliated with the servers or forums shown here and is not responsible for the content of articles, which is written by their respective authors.