CVS: msp430-libc/include msp430x21x1.h,1.4,1.5 msp430x42x0.h,1.2,1.3
Steve Underwood <[email protected]>
| Newsgroups | gmane.comp.hardware.texas-instruments.msp430.gcc.cvs |
|---|---|
| Message-ID | <[email protected]> |
Update of /cvsroot/mspgcc/msp430-libc/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv18382/msp430-libc/include Modified Files: msp430x21x1.h msp430x42x0.h Log Message: Interrupt definitions not compatible with the mspgcc macros in the 42x0 and 21x1 headers Index: msp430x21x1.h =================================================================== RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430x21x1.h,v retrieving revision 1.4 retrieving revision 1.5 diff -u -w -d -r1.4 -r1.5 --- msp430x21x1.h 17 Aug 2005 14:28:46 -0000 1.4 +++ msp430x21x1.h 24 Aug 2005 12:21:15 -0000 1.5 @@ -68,13 +68,13 @@ sfrb(CALBC1_1MHZ, CALBC1_1MHZ_); #endif /* #ifndef __DisableCalData */ -#define PORT1_VECTOR (2 * 2u) /* 0xFFE4 Port 1 */ -#define PORT2_VECTOR (3 * 2u) /* 0xFFE6 Port 2 */ -#define TIMERA1_VECTOR (8 * 2u) /* 0xFFF0 Timer A CC1-2, TA */ -#define TIMERA0_VECTOR (9 * 2u) /* 0xFFF2 Timer A CC0 */ -#define WDT_VECTOR (10 * 2u) /* 0xFFF4 Watchdog Timer */ -#define COMPARATORA_VECTOR (11 * 2u) /* 0xFFF6 Comparator A */ -#define NMI_VECTOR (14 * 2u) /* 0xFFFC Non-maskable */ +#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */ +#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */ +#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */ +#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */ +#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */ +#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */ +#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */ #endif /* #ifndef __msp430x21x1 */ Index: msp430x42x0.h =================================================================== RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430x42x0.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -w -d -r1.2 -r1.3 --- msp430x42x0.h 17 Aug 2005 14:28:46 -0000 1.2 +++ msp430x42x0.h 24 Aug 2005 12:21:15 -0000 1.3 @@ -70,18 +70,18 @@ sfrb(IFG2,IFG2_); #define BTIFG (1<<7) -#define BASICTIMER_VECTOR (0 * 2u) /* 0xFFE0 Basic Timer */ -#define PORT2_VECTOR (1 * 2u) /* 0xFFE2 Port 2 */ +#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer */ +#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */ -#define DAC12_VECTOR (3 * 2u) /* 0xFFE6 DAC 12 */ -#define PORT1_VECTOR (4 * 2u) /* 0xFFE8 Port 1 */ -#define TIMERA1_VECTOR (5 * 2u) /* 0xFFEA Timer A CC1-2, TA */ -#define TIMERA0_VECTOR (6 * 2u) /* 0xFFEC Timer A CC0 */ +#define DAC12_VECTOR 6 /* 0xFFE6 DAC 12 */ +#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */ +#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */ +#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */ -#define WDT_VECTOR (10 * 2u) /* 0xFFF4 Watchdog Timer */ +#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */ -#define SD16_VECTOR (12 * 2u) /* 0xFFF8 Sigma Delta ADC */ +#define SD16_VECTOR 24 /* 0xFFF8 Sigma Delta ADC */ -#define NMI_VECTOR (14 * 2u) /* 0xFFFC Non-maskable */ +#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */ #endif /* #ifndef __msp430x42x0 */ ------------------------------------------------------- SF.Net email is Sponsored by the Better Software Conference & EXPO September 19-22, 2005 * San Francisco, CA * Development Lifecycle Practices Agile & Plan-Driven Development * Managing Projects & Teams * Testing & QA Security * Process Improvement & Measurement * http://www.sqe.com/bsce5sf