CVS: msp430-libc4/include iomacros.h,1.1.1.1,1.2 signal.h,1.1.1.1,1.2
Dmitry Diky <[email protected]>
| Newsgroups | gmane.comp.hardware.texas-instruments.msp430.gcc.cvs |
|---|---|
| Message-ID | <[email protected]> |
Update of /cvsroot/mspgcc/msp430-libc4/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv7474/include Modified Files: iomacros.h signal.h Log Message: 2005-08-29 Dmitry Diky <[email protected]> * include/iomacros.h (__read_sr_register): New function. (__set_sr_register): Likewise. (__bis_sr_register): Likewise. (__bic_sr_register): Likewise. (_BIS_SR): Redefined. (_BIC_SR): Likewise. (WRITE_SR): Likewise. (READ_SR): Likewise. * include/signal.h (eint): Likewise. (dint): Likewise. Index: iomacros.h =================================================================== RCS file: /cvsroot/mspgcc/msp430-libc4/include/iomacros.h,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -u -w -d -r1.1.1.1 -r1.2 --- iomacros.h 29 Aug 2005 16:48:45 -0000 1.1.1.1 +++ iomacros.h 29 Aug 2005 18:32:24 -0000 1.2 @@ -70,30 +70,6 @@ #define SavePrologue __attribute__ ((saveprologue)) #define SAVEPROLOGUE __attribute__ ((saveprologue)) -/* - * Status register. Cannot do - * register SR asm("r2"); cause it - * is not general register - */ - -#define WRITE_SR(x) \ -__asm__ __volatile__( "mov %0, r2" : : "r" ((uint16_t)x) ); - -#define READ_SR \ -({ \ - uint16_t __x; \ - __asm__ __volatile__( \ - "mov r2, %0" \ - : "=r" ((uint16_t)__x) \ - :); \ - __x; \ -}) - - -/* - * Can do assembler assignement with r1 - * but wrote next two for consistentcy - */ #define WRITE_SP(x) \ __asm__ __volatile__( "mov %0, r1" : : "r" ((uint16_t)x) ); @@ -108,17 +84,18 @@ __x; \ }) -#define _BIS_SR(x) __asm__ __volatile__( "bis %0, r2" : : "i" ((uint16_t)x) ); -#define _BIC_SR(x) __asm__ __volatile__( "bic %0, r2" : : "i" ((uint16_t)x) ); - -#define __bis_SR_register(x) __asm__ __volatile__( "bis %0, r2" : : "i" ((uint16_t)x) ); -#define __bic_SR_register(x) __asm__ __volatile__( "bic %0, r2" : : "i" ((uint16_t)x) ); - - +extern int __read_sr_register(void); +extern void __set_sr_register(int); +extern void __bis_sr_register(int); +extern void __bic_sr_register(int); extern void __bis_sr_irq(int); extern void __bic_sr_irq(int); extern void *__get_frame_address(void); +#define WRITE_SR(x) __set_sr_register(x) +#define READ_SR __read_sr_register() +#define _BIS_SR(x) __bis_sr_register(x) +#define _BIC_SR(x) __bic_sr_register(x) #define _BIS_SR_IRQ(x) __bis_sr_irq(x) #define _BIC_SR_IRQ(x) __bic_sr_irq(x) Index: signal.h =================================================================== RCS file: /cvsroot/mspgcc/msp430-libc4/include/signal.h,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -u -w -d -r1.1.1.1 -r1.2 --- signal.h 29 Aug 2005 16:48:45 -0000 1.1.1.1 +++ signal.h 29 Aug 2005 18:32:24 -0000 1.2 @@ -49,8 +49,8 @@ /* Enable/Disable interrupts */ -#define eint() __asm__ __volatile__("eint"::) -#define dint() __asm__ __volatile__("dint"::) +#define eint() __bis_sr_register(8) +#define dint() __bic_sr_register(8) /* IAR compatibility functions */ #define _EINT() eint() ------------------------------------------------------- SF.Net email is Sponsored by the Better Software Conference & EXPO September 19-22, 2005 * San Francisco, CA * Development Lifecycle Practices Agile & Plan-Driven Development * Managing Projects & Teams * Testing & QA Security * Process Improvement & Measurement * http://www.sqe.com/bsce5sf