Re: feature request from r5rs
| Newsgroups | gmane.comp.java.sisc.devel |
|---|---|
| Message-ID | <[email protected]> |
On Wed, Jun 11, 2003 at 02:11:50PM +0100, Matthias Radestock wrote: > Narang wrote: > >From r5rs: * Some implementations may implement ``implicit forcing,'' > >where the value of a promise is forced by primitive procedures like > >cdr and +: > > > >(+ (delay (* 3 7)) 13) ===> 34 > > > > > >Can this feature be added to sisc? thoughts. > > It wouldn't be hard to add, with three caveats: > > * preventing it from slowing down *everything* is difficult, > > * synchronization is required in order to implement the correct > semantics in the presence of multiple threads, > > * care needs to be taken to ensure the correct call/cc semantics is > implemented. > > R5RS doesn't say anything explictly about the last point. However, it is > clear from the examples that capturing a k inside a delayed expression > and subsequently invoking it will > > * (partially) re-evaluate the delayed expression and re-set the memoized > value, > > * resume computation at the point where the force (explicit or implicit) > occured. Fortunately our evaluation model covers correct call/cc semantics fairly easily, if done right. The key is that any SISC uexp design should divide any sequence where a continuation should be captured into two uexps, the former being the computation, the latter being the effect. Hence the division into *Exp, *Eval. So implicit forcing would be something to the effect of: EvalExp -> PromiseSetEval Where the EvalExp contains the body of the promise, and the PromiseSetEval thread-safely sets the memo box. Scott
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