[Bug 92] threading is broken (most visible on SMP)

http://sablevm.org/bugs/show_bug.cgi?id=92





------- Additional Comments From [email protected]  2005-03-20 22:54 -------
I realized when debugging my own spmt code that any time you have a word
guarding other parts of memory, you need a memory barrier before you write to
it.  The single-value replacement idea depends on an specific ordering of writes.

For example, in preparation sequences, the GOTO is replaced at the very end. 
But what happens if the actual GOTO write is made visible to other processors
*before* the other writes that the word guards?  This might happen for one
reason or another on an SMP machine.  It means the instruction (I observed it
for LDC_STRING) can read unprepared values from the code array.

I think this is may be a problem in several places.

If you guys can think of any other examples where the value of a word implies
some particular value / safety property / data type of other words, it is likely
that a memory barrier is needed.

I'll test out the trunk with the examples that make SMP crash.

Chris



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