[qt/clang/llvm]: Summary of bulk changes made

Git repository change summary for qt/clang/llvm
Pushed by mirror-service into branch 'upstream/users/redstar/writinganllvmbackend'.
Changed from 0000000000000000000000000000000000000000 to 7c513f7a77d4653428d83cc7c666b8e810f22846
Acknowledgement was received that this change introduces only existing code that has been pushed to another public open source repository.

This change contains the following new commits:

Git commit f27602f77d2bccdd1ab17e6afc4b48fc0a32b993 by GitHub (on behalf of Aiden Grossman) on 28/07/2026 at 17:27..
Revert "[SimplifyCFG] Fix branch-weight overflow when folding switch case into default" (#212540)
https://invent.kde.org/qt/clang/llvm/-/commit/f27602f77d2bccdd1ab17e6afc4b48fc0a32b993

Git commit 98568f6567999d03e15a611b3fed1abcfab2f123 by GitHub (on behalf of adams381) on 28/07/2026 at 17:29..
[CIR] Accept __int128 in x86_64 calling-convention lowering (#211142)

The x86_64 calling-convention bridge rejected every integer wider than 64
bits, so a function taking or returning `__int128` hit `errorNYI` even though
its ABI treatment is simple.

On x86_64 `__int128` is Direct and passes in a pair of integer registers,
matching an i128 argument or return in classic CodeGen. `isSupportedType` now
accepts non-bitint integers of width 128 alongside the register-sized widths.
A struct holding a single `__int128` is exactly two eightbytes, so it reaches
the aggregate path and is Direct-coerced to i128; a struct spanning more than
two eightbytes stays Indirect (byval/sret).

`_BitInt` stays rejected pending its register-pair coercion and padding
handling, including `_BitInt(128)`. Non-C intermediate widths (65..127) stay
rejected too: the scalar Direct branch would pass them through unchanged,
without the register-pair coercion they would need.
https://invent.kde.org/qt/clang/llvm/-/commit/98568f6567999d03e15a611b3fed1abcfab2f123

Git commit 7ac6b9ff31dbd3a028585ccd18d8a7a290303d58 by GitHub (on behalf of Jonas Devlieghere) on 28/07/2026 at 17:49..
[lldb] Report the unwound PC for WebAssembly caller frames (#212326)

RegisterContextWasm delegated the PC register read to
GDBRemoteRegisterContext, which reports the live innermost PC for every
frame. Resolving a variable whose DWARF location is a location list in a
caller frame therefore chose the entry using the innermost frame's PC
instead of the caller's, so the variable read back as unavailable even
though its location covered the caller's PC.

Return the program counter the WebAssembly unwinder recorded for the
frame (from qWasmCallStack) when reading a caller frame's PC, so the
location list entry uses the correct frame.
https://invent.kde.org/qt/clang/llvm/-/commit/7ac6b9ff31dbd3a028585ccd18d8a7a290303d58

Git commit d4d007b581bef93d6b7cee4bf9d621804826a9d6 by GitHub (on behalf of Jinseok Kim) on 28/07/2026 at 17:52..
[asan][NFC] Fix comments in asan_poisoning.cpp (#212449)

Remove duplicated wording and fix typos in comments.

Signed-off-by: Jinseok Kim <[email protected]>
https://invent.kde.org/qt/clang/llvm/-/commit/d4d007b581bef93d6b7cee4bf9d621804826a9d6

Git commit 488ba8b8d28fbab361a56111591acb1bf8c33371 by GitHub (on behalf of Matt Arsenault) on 28/07/2026 at 17:52..
AMDGPU: Split R600 feature bitmask into separate enum from amdgcn (#212484)
https://invent.kde.org/qt/clang/llvm/-/commit/488ba8b8d28fbab361a56111591acb1bf8c33371

Git commit a4a9b6864c6f185500f08a5a037d93b5e67657dc by GitHub (on behalf of Yingwei Zheng) on 28/07/2026 at 17:58..
[SimplifyCFG] Handle degenerate conditional branch (#212552)

IR before entering the function:
```
define void @func(i1 %cond) {
entry:
  br i1 %cond, label %exit, label %exit

exit:                                             ; preds = %entry, %entry
  %phi = phi i1 [ false, %entry ], [ false, %entry ]
  tail call void @llvm.assume(i1 %phi)
  ret void
}
```
The original code only removes one edge. There is still an edge from
entry to exit, triggering the `Deleted edge still exists in the CFG`
assertion.

Closes https://github.com/llvm/llvm-project/issues/212542
https://invent.kde.org/qt/clang/llvm/-/commit/a4a9b6864c6f185500f08a5a037d93b5e67657dc

Git commit ee25d3ec23a8b612ae3fa3eed8f8b88b00f582df by GitHub (on behalf of Faijul Amin) on 28/07/2026 at 18:02..
[SPIRV] Preserve sign-sensitive width record across G_TRUNC replacement (#211626)

**Summary**
Follow-up to #203661. When the `G_TRUNC` handler in `SPIRVPreLegalizer`
collapses source and destination to the same widened width, it calls
`MRI.replaceRegWith(DstReg, MaskedReg)` and drops the original
`G_TRUNC`. The `SignSensitiveInfo.OrigWidth` map, however, was still
keyed on `DstReg`, so `widenSignSensitiveOps` no longer found the narrow
original width and skipped the `shl/ashr` sign extension for signed
users of the truncated value.
Rekey `OrigWidth` from `DstReg` to `MaskedReg` before the
`replaceRegWith` so signed ops fed by the truncated value still receive
`G_SEXT_INREG` on the widened type.

**Test plan**
New test case is added to
`llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll`: `trunc i8 →
i4` feeding `icmp slt` — src and dst both widen to `i8`, exercising the
same-width `replaceRegWith` path. Checks that the widened `i8` compare
is preceded by matching `OpShiftLeftLogical / OpShiftRightArithmetic`
pairs on both operands.
https://invent.kde.org/qt/clang/llvm/-/commit/ee25d3ec23a8b612ae3fa3eed8f8b88b00f582df

Git commit b0960bd33024c6e22b680df5d4fb675f61b64ad0 by GitHub (on behalf of Fangrui Song) on 28/07/2026 at 18:04..
[CodeGen] Stop requiring analyses that no pass reads (#212430)

Remove analysis requirements whose pass never calls getAnalysis for
them, and MachineSchedContext::MDT, which no scheduler reads. Also remove
addPreserved calls subsumed by setPreservesCFG (MachineDominatorTree and
MachineLoopInfo are CFG-only analyses) and a now-unpaired INITIALIZE_PASS_DEPENDENCY.

The PowerPC, Hexagon and R600 pipelines each drop a MachineDominatorTree
construction.

Aided by Claude Opus 5
https://invent.kde.org/qt/clang/llvm/-/commit/b0960bd33024c6e22b680df5d4fb675f61b64ad0

Git commit 0db95253f93987e4c37594883208a42d3ebee563 by GitHub (on behalf of Taimuraz Kaitmazov) on 28/07/2026 at 18:06..
[clang][ClangScanDeps] Relax logging-two-threads for duplicate module validation (#210587)

`ClangScanDeps/logging-two-threads.c` is flaky. It asserts each module's
timestamp is written exactly once, but under
`-fmodules-validate-once-per-build-session` two workers scanning
different TUs can both notice the shared module is unvalidated this
session and each validate and record it before the other's write lands,
so its timestamp is written once or twice depending on the interleaving.

The double write is harmless: the timestamp field is atomic and both
workers store the same session time. Only the exact-count assertion was
wrong.

Relax the test to the real invariant: the shared module A is written
once or twice and the single-TU module B exactly once. Module compile
and pcm write stay exactly once (the in-memory cache builds each module
once) and the per-module event ordering is still checked by the sequence
blocks.

The redundant validation itself (two workers validating the same module)
is a separate, pre-existing issue noted by the validation-lock TODO in
`ModuleCache.h`; I plan to look at that separately.

AI assistance: drafted with AI help; reviewed and validated by me.
https://invent.kde.org/qt/clang/llvm/-/commit/0db95253f93987e4c37594883208a42d3ebee563

Git commit 6d59a24272b7d0ffbf5c04b8878dfcc08c0bc0d9 by GitHub (on behalf of Changpeng Fang) on 28/07/2026 at 18:07..
[AMDGPU] Generate literal32 operand for packed fp32 instructions (#212530)

Literal32 operand is supported for gfx1250+ for v_pk_*_f32
https://invent.kde.org/qt/clang/llvm/-/commit/6d59a24272b7d0ffbf5c04b8878dfcc08c0bc0d9

Git commit 9d4eb0a855242a37a7541682934a6dd811474d11 by GitHub (on behalf of Matt Arsenault) on 28/07/2026 at 18:10..
PowerPC: Rename "float-abi" module flag to "long-double-type" (#210817)

PPC was emitting a "float-abi" module flag for indicating the type of
long double. The "float ABI" naming is already widely taken by soft vs. 
hard float controls (e.g., the clang flag is called -mfloat-abi), so this 
shouldn't have  taken it. This should also not be PPC specific; x86 has 
the same problem. Rename  the flag to the more specific 
long-double-type,  and  add appropriate verification and documentation 
(which was also missing).  Also  changes the value names to match the IR 
type names.

Co-authored-by: Claude (Claude-Opus-4.8) <[email protected]>
https://invent.kde.org/qt/clang/llvm/-/commit/9d4eb0a855242a37a7541682934a6dd811474d11

Git commit 3919897e1b1b2c4f4327e9a8a9eebfb91bc75616 by GitHub (on behalf of Srividya Sundaram) on 28/07/2026 at 18:11..
Revert "[Driver][SYCL] Add compile-time device library linking for SPIR-V targets" (#212550)

Reverts llvm/llvm-project#196656
The CI does not yet build compiler-rt with SPIR-V support, so
libclang_rt.builtins.bc is absent on that bot. This change made the
missing file a hard error, breaking all libsycl functional tests that
compile with -fsycl.

Re-landing after CI is updated to build compiler-rt for SPIR-V.
https://invent.kde.org/qt/clang/llvm/-/commit/3919897e1b1b2c4f4327e9a8a9eebfb91bc75616

Git commit 1a2691c3d3ff24dc5dc52a80b3e1ed3f8ee1706a by GitHub (on behalf of Abhinav Gaba) on 28/07/2026 at 18:27..
[NFC][OpenMP] Add mapper-specific tests exercising pointee section mapping. (#204269)

* Add a few tests for when a mapper does something like `map(s.p[0:10])`
where `p` is a pointer.
* Add a few tests that require propagation of bits like `present/always`
into a mapper.
* Fix a few tests that were expecting `p` to be mapped when the mapper
only said `map(s.p[0:10])`.

The output of a few tests is different from what we expect. They have
been annotated with FIXMEs, and the expected output for when the
follow-up changes in this stack to propagate the map-type-modifier bits
and using attach-style mapping for mappers get merged.

---------

Co-authored-by: Claude Opus 4.8 <[email protected]>
https://invent.kde.org/qt/clang/llvm/-/commit/1a2691c3d3ff24dc5dc52a80b3e1ed3f8ee1706a

Git commit 16f45b7f184c776b40a6893c8d6f6f02d5185c47 by GitHub (on behalf of Valentin Clement (バレンタイン クレメン)) on 28/07/2026 at 18:28..
[flang][cuda] Add option to set priority to the CUDA Fortran constructor (#212561)
https://invent.kde.org/qt/clang/llvm/-/commit/16f45b7f184c776b40a6893c8d6f6f02d5185c47

Git commit 8aceb2f64b33f3c70b712ccd464774fa7d620d19 by GitHub (on behalf of Alexander Johnston) on 28/07/2026 at 18:30..
[HLSL] Implement HLSL InterlockedXor (#209254)

Follows existing HLSL InterlockedOp implementations to provide
InterlockedXor in HLSL, with DirectX and SPIRV support.

https://github.com/llvm/llvm-project/issues/99127
https://invent.kde.org/qt/clang/llvm/-/commit/8aceb2f64b33f3c70b712ccd464774fa7d620d19

Git commit 6bf2f466c1a77c1e97175dc14a11564133a0638b by GitHub (on behalf of Petr Kurapov) on 28/07/2026 at 18:32..
[MIR2Vec] Handle machine functions with no basic blocks (#212294)

depth_first() asserts on an empty MachineFunction, since getEntryNode()
dereferences the block list sentinel via front(). Return the zero vector
instead, as IR2Vec does for declarations.
https://invent.kde.org/qt/clang/llvm/-/commit/6bf2f466c1a77c1e97175dc14a11564133a0638b

Git commit 26643a89ddf98e48e986d25ceb10f673735bc7d7 by GitHub (on behalf of Anatoly Trosinenko) on 28/07/2026 at 18:35..
[PAC][Headers] Fix incorrect comment in ptrauth.h (#207265)

The discriminator which is used to sign pointers to v-tables
is not always zero.
https://invent.kde.org/qt/clang/llvm/-/commit/26643a89ddf98e48e986d25ceb10f673735bc7d7

Git commit 85305ba2b67ea806e1e04b61dcc8743b19f51fc8 by GitHub (on behalf of Arseniy Obolenskiy) on 28/07/2026 at 18:49..
[AMDGPU] Fix llvm.amdgcn.ballot with return width != wavefront size (#211493)

Before wave mask was emitted directly in the requested return type,
which failed to select for i32 ballots on wave64 (and vice versa)

Compute the mask at the wavefront width and then zext or trunc it to the
result type
https://invent.kde.org/qt/clang/llvm/-/commit/85305ba2b67ea806e1e04b61dcc8743b19f51fc8

Git commit e146c04973fc3faf6dbf74bacdf8d62553f6fed5 by GitHub (on behalf of Chinmay Deshpande) on 28/07/2026 at 19:00..
[AMDGPU] Add SRAMECC to feature list for gfx12-5-generic (#212573)
https://invent.kde.org/qt/clang/llvm/-/commit/e146c04973fc3faf6dbf74bacdf8d62553f6fed5

Git commit 7c513f7a77d4653428d83cc7c666b8e810f22846 by Kai Nacke on 28/07/2026 at 19:11..
[LLVM][docs] Small updates to Writing an Backend

- Methods `eliminateCallFramePseudoInstr`, `emitPrologue`, `emitEpilogue` have to be implemented in subclass of `TargetFrameLowering`
- Method `hasFP` was renamed to `hasFPImpl`, and also belongs into subclass of `TargetFrameLowering`
- Give path to the `TargetInfo` class
- Fix parameters of `RegisterTarget`
- Fix path to `TargetRegistry.h`

Assisted by IBM Bob
https://invent.kde.org/qt/clang/llvm/-/commit/7c513f7a77d4653428d83cc7c666b8e810f22846