[qt/clang/llvm-project]: Summary of bulk changes made

Git repository change summary for qt/clang/llvm-project
Pushed by mirror-service into branch 'upstream/users/hjagasiaAMD/swp-2-max-mii'.
Changed from fcebc45ab06b64a39dde5ef088d59feb2f04a091 to ea86be1c21543701eaccf3a7d4c5fcb0cff6f965
Acknowledgement was received that this change introduces only existing code that has been pushed to another public open source repository.

This change contains the following new commits:

Git commit 6f79f56806d859fb20f7507f19ed726b45323d4c by Harsha Jagasia on 29/07/2026 at 16:37..
[AMDGPU] Add MachinePipeliner support for AMDGPU

Implement the target hooks to enable MachinePipeliner for AMDGPU. The
pass is off by default and can be enabled with -amdgpu-enable-pipeliner
at -O2 and above.

Only uniform, single-basic-block counted loops with a scalar (SCC)
back-edge are pipelined; loops with a divergent (VCC/EXEC) back-edge, or
containing calls or inline asm, are rejected. Code is generated by the
default modulo schedule expander (DFA, window scheduler, and MVE
expansion are disabled for AMDGPU).

Validated on gfx942 and gfx950 with Composable Kernel and Triton workloads.
https://invent.kde.org/qt/clang/llvm-project/-/commit/6f79f56806d859fb20f7507f19ed726b45323d4c

Git commit ea86be1c21543701eaccf3a7d4c5fcb0cff6f965 by Harsha Jagasia on 29/07/2026 at 16:40..
[AMDGPU] Raise the MachinePipeliner MII cap via a target hook

The pipeliner rejects any loop whose minimum initiation interval (MII)
exceeds -pipeliner-max-mii, default 27. That is far too low for real
AMDGPU loops: resource-bound GEMM/attention bodies routinely have an MII
well above 27 and are dropped before scheduling even starts.

Add a PipelinerLoopInfo::getMaxMII() hook so a target can raise the cap,
and override it to 256 for AMDGPU. The generic default is unchanged, and
an explicit -pipeliner-max-mii still takes precedence.

The cap of 256 is chosen from the II distributions of two AMDGPU
workloads.

Composable Kernels:
  II range   count    pct
    0- 24     2305   36.7%
   25- 49     1681   26.8%
   50- 99     1582   25.3%
  100-149      578    9.2%
  150-299       64    1.0%

Triton:
  II range   count    pct
   96-128       19   50.0%
  128-160       11   28.9%
  160-192        2    5.3%
  192-224        2    5.3%
  224-256        4   10.5%

256 captures the bulk of both workloads while still rejecting
pathologically large loops up front.
https://invent.kde.org/qt/clang/llvm-project/-/commit/ea86be1c21543701eaccf3a7d4c5fcb0cff6f965