[qt/clang/llvm-project]: Summary of bulk changes made

Git repository change summary for qt/clang/llvm-project
Pushed by mirror-service into branch 'upstream/users/hjagasiaAMD/swp-3-rp-hooks'.
Changed from 6ce0e9325dd29bebfea5991c7779e0f6139cc75b to 71654dd60cf5c2ec2c3e87df8fa70b1675a9cb34
Acknowledgement was received that this change introduces only existing code that has been pushed to another public open source repository.

This change contains the following new commits:

Git commit b0fea17d4a804ac51e89afd2d552f190ff4e9dfc by Harsha Jagasia on 29/07/2026 at 21:14..
[AMDGPU] Add MachinePipeliner support for AMDGPU

Implement the target hooks to enable MachinePipeliner for AMDGPU. The
pass is off by default and can be enabled with -amdgpu-enable-pipeliner
at -O2 and above.

Only uniform, single-basic-block counted loops with a scalar (SCC)
back-edge are pipelined; loops with a divergent (VCC/EXEC) back-edge, or
containing calls or inline asm, are rejected. Code is generated by the
default modulo schedule expander (DFA, window scheduler, and MVE
expansion are disabled for AMDGPU).

Validated on gfx942 and gfx950 with Composable Kernel and Triton workloads.
https://invent.kde.org/qt/clang/llvm-project/-/commit/b0fea17d4a804ac51e89afd2d552f190ff4e9dfc

Git commit 3d32ea2e154f6fd7fcbaa770aaa5d4229b132712 by Harsha Jagasia on 29/07/2026 at 21:14..
[AMDGPU] Raise the MachinePipeliner MII cap via a target hook

The pipeliner rejects any loop whose minimum initiation interval (MII)
exceeds -pipeliner-max-mii, default 27. That is far too low for real
AMDGPU loops: resource-bound GEMM/attention bodies routinely have an MII
well above 27 and are dropped before scheduling even starts.

Add a PipelinerLoopInfo::getMaxMII() hook so a target can raise the cap,
and override it to 256 for AMDGPU. The generic default is unchanged, and
an explicit -pipeliner-max-mii still takes precedence.

The cap of 256 is chosen from the II distributions of two AMDGPU
workloads.

Composable Kernels:
  II range   count    pct
    0- 24     2305   36.7%
   25- 49     1681   26.8%
   50- 99     1582   25.3%
  100-149      578    9.2%
  150-299       64    1.0%

Triton:
  II range   count    pct
   96-128       19   50.0%
  128-160       11   28.9%
  160-192        2    5.3%
  192-224        2    5.3%
  224-256        4   10.5%

256 captures the bulk of both workloads while still rejecting
pathologically large loops up front.
https://invent.kde.org/qt/clang/llvm-project/-/commit/3d32ea2e154f6fd7fcbaa770aaa5d4229b132712

Git commit 71654dd60cf5c2ec2c3e87df8fa70b1675a9cb34 by Harsha Jagasia on 29/07/2026 at 21:14..
[MachinePipeliner] Add PipelinerLoopInfo hooks to reuse the reg-pressure detector

The generic MachinePipeliner register-pressure detector (added in #74807)
was only reachable via the global -pipeliner-register-pressure flag, which
cannot be enabled per-target, and it judges pressure against generic
per-pressure-set limits. Add two PipelinerLoopInfo hooks so a target can
reuse that detector on its own terms:

- shouldLimitRegPressure(): A target can opt the loop into the detector without
  the global flag.
- isScheduleRegPressureTooHigh(MaxSetPressure): let the target replace the
  detector's generic per-pressure-set limit check with its own verdict, or
  return nullopt to keep that check.

Both hooks default to preserving current behavior, so targets that do not
override them are unaffected.

Exercised by the AMDGPU adoption in the following commit.
https://invent.kde.org/qt/clang/llvm-project/-/commit/71654dd60cf5c2ec2c3e87df8fa70b1675a9cb34