[qt/clang/llvm-project]: Summary of bulk changes made

Git repository change summary for qt/clang/llvm-project
Pushed by mirror-service into branch 'upstream/users/hjagasiaAMD/swp-2-max-mii'.
Changed from 3d32ea2e154f6fd7fcbaa770aaa5d4229b132712 to 6e940f2c3bf7065ac714cd78139af84397759a42
Acknowledgement was received that this change introduces only existing code that has been pushed to another public open source repository.

This change contains the following new commits:

Git commit 6e940f2c3bf7065ac714cd78139af84397759a42 by Harsha Jagasia on 30/07/2026 at 17:22..
[AMDGPU] Allow MachinePipeliner to consider loops with large MIIs

The pipeliner rejects any loop whose minimum initiation interval (MII)
exceeds -pipeliner-max-mii, default 27. This can be too low for targets
with long instruction latencies, such as AMDGPU, where loops can have an
MII well above 27.

Add a PipelinerLoopInfo::allowLargeLoops() hook so a target can opt in
to a larger MII limit, and enable it for AMDGPU. Opted-in targets use a
limit of 256, while the generic default remains 27. An explicit
-pipeliner-max-mii still takes precedence.

The larger limit of 256 is chosen to cover the observed II distributions
of two AMDGPU workloads.

Composable Kernels:
  II range   count    pct
    0- 24     2305   36.7%
   25- 49     1681   26.8%
   50- 99     1582   25.3%
  100-149      578    9.2%
  150-299       64    1.0%

Triton:
  II range   count    pct
   96-128       19   50.0%
  128-160       11   28.9%
  160-192        2    5.3%
  192-224        2    5.3%
  224-256        4   10.5%

For these AMDGPU workloads, 256 captures the bulk of loops while retaining
a finite upper bound.
https://invent.kde.org/qt/clang/llvm-project/-/commit/6e940f2c3bf7065ac714cd78139af84397759a42