[qt/clang/llvm-project]: Summary of bulk changes made
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Git repository change summary for qt/clang/llvm-project Pushed by mirror-service into branch 'upstream/main'. Changed from f180ce951b1a93c8998b029ad9b0649bb92552c8 to e6566492c03c164f4cc4a0775a864c8d59d3f941 Acknowledgement was received that this change introduces only existing code that has been pushed to another public open source repository. This change contains the following new commits: Git commit 8972983ea1ce1496f50b8985be4c817ad40c8ed2 by GitHub (on behalf of Elvina Yakubova) on 06/08/2026 at 23:20.. [BOLT][AArch64] Add TLSGD relocations support (#213700) https://invent.kde.org/qt/clang/llvm-project/-/commit/8972983ea1ce1496f50b8985be4c817ad40c8ed2 Git commit d50b9947b27ff3c907a16b96cee50e8782236feb by GitHub (on behalf of Meredith Julian) on 06/08/2026 at 23:25.. [NVPTX][AsmPrinter] Allow fp128 aggregate types in NVPTX backend (#214546) Fixes an issue where aggregate types containing fp128 non-zero elements would cause "unsupported type" due to missing case in bufferLEByte. Adds fp128-global.ll test. https://invent.kde.org/qt/clang/llvm-project/-/commit/d50b9947b27ff3c907a16b96cee50e8782236feb Git commit 5194e33faad9d84fd8d21c0305621a17e0d8a49f by GitHub (on behalf of Lang Hames) on 06/08/2026 at 23:26.. [ORC] Hoist Caller state into the base; add operator bool (#214483) Move the ExecutionSession reference and callee address up from the SPS implementation into the rt::Caller base, together with their constructor and new executionSession() / calleeAddr() accessors. The named callers (MainCaller, VoidVoidCaller, ...) become plain aliases of Caller rather than subclasses, and rt::sps::Caller inherits the base constructor. Add an explicit operator bool() reporting whether the caller has a non-null callee address. Give rt::sps::Caller::Create a SymbolLookupFlags parameter. Looking the callee up as a weakly-referenced symbol now yields a caller with a null callee (operator bool == false) when the symbol is absent, rather than an error -- so callers for optional runtime functions can be constructed and then tested for availability. Adds SPSCallersTest coverage for operator bool and the accessors, and for the required/weak x present/absent Create paths. https://invent.kde.org/qt/clang/llvm-project/-/commit/5194e33faad9d84fd8d21c0305621a17e0d8a49f Git commit 3e9646a812300b86474e347066a37bf24b6fc10a by GitHub (on behalf of YAMAMOTO Takashi) on 07/08/2026 at 00:04.. [lld][WebAssembly] Allow linker-synthetic symbols to be undefine when building shared libraries (#153537) Fixes: #103592 https://invent.kde.org/qt/clang/llvm-project/-/commit/3e9646a812300b86474e347066a37bf24b6fc10a Git commit 9c121cd44867cd542964ae06617da1c40432bf2b by GitHub (on behalf of Eric Christopher) on 07/08/2026 at 00:12.. [DebugInfo] Fix compact DWARF expression failure handling (#213391) printDwarfExpressionCompact has two pre-existing failure paths that silently produce bad output. The register-name callback is optional, but the short DW_OP_reg* and DW_OP_breg* paths call it directly, so a missing callback falls over. Use resolveRegName for every register form and report an unknown register only after both name-resolution paths fail. DW_OP_entry_value has the same problem: it ignores a failed recursive print, wraps the partial output in entry(...), and returns true. Print entry-value subexpressions into a temporary buffer and propagate failure before adding entry(...), so a failed subexpression can't come back as successful output. While here, GetRegName in llvm-objdump has a latent ordering issue: it writes an unknown-register diagnostic as soon as target lookup misses, even though resolveRegName can still decode an ASCII-packed virtual-register name. There's no natural in-tree input that hits this today -- LLVM emits text PTX and there's no NVPTX disassembler -- but a future out-of-tree disassembler using the same encoding would otherwise print a valid %r1 as "<unknown register 2454065>%r1". Keep GetRegName lookup-only and let the compact printer own the diagnostic. The llvm-objdump test makes the theoretical path testable by putting NVPTX's packed value for %r1 in ARM DWARF, so target lookup misses before packed-name decoding succeeds. Add target-independent unit coverage for missing callbacks, unknown registers, and nested failures. Tested via make check. Assisted by AI. https://invent.kde.org/qt/clang/llvm-project/-/commit/9c121cd44867cd542964ae06617da1c40432bf2b Git commit 52006000d1b886ca67c80554d06d3119c706749a by GitHub (on behalf of dmaclach) on 07/08/2026 at 00:14.. [include-cleaner] Ensure receiver headers are kept when accessing ObjC properties (#212633) When accessing Objective-C properties via dot-notation (e.g., obj.foo), include-cleaner was previously only recording the usage of the property itself or its underlying getter/setter methods. This could lead to cases where the header declaring the receiver's type (Interface or Protocol) was incorrectly flagged as unused if no other standard methods were invoked on it. https://invent.kde.org/qt/clang/llvm-project/-/commit/52006000d1b886ca67c80554d06d3119c706749a Git commit 9219721a5d68b75a16e8d101e0114c2cff48ba3d by GitHub (on behalf of Yonah Goldberg) on 07/08/2026 at 00:34.. [NVPTX] Fix broken cache hint metadata lit tests (#214600) I just merged https://github.com/llvm/llvm-project/pull/204067 and unfortunately forgot to locally compile all the PTX I was generating from cache hint metadata in lit tests. - I didn't know that .L2::cache_hint isn't valid on PTX volatile loads. We need to drop the metadata then for volatile loads. I'll put this up in a PR later, but for now just delete the lit test that generates the invalid PTX. I'll add it back in the follow up. - I forgot to provide SM version and PTX version when invoking ptxas for the lit tests. https://invent.kde.org/qt/clang/llvm-project/-/commit/9219721a5d68b75a16e8d101e0114c2cff48ba3d Git commit 77b44eb872002dae26be3de22671affbfb94a07b by GitHub (on behalf of Reid Kleckner) on 07/08/2026 at 00:38.. [docs][clang-format] Rename clang-format docs *.rst -> *.md, update refs (#211397) Tracking issue: #201242 See the [migration guide] for more information. [migration guide]: https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines This is the initial straight rename commit. It will probably break the docs build, but it has to be a separate PR for blame preservation purposes. --------- Co-authored-by: owenca <[email protected]> https://invent.kde.org/qt/clang/llvm-project/-/commit/77b44eb872002dae26be3de22671affbfb94a07b Git commit 668134e8acf10218663a0c33835bd4157ba358c4 by GitHub (on behalf of Roy Shi) on 07/08/2026 at 00:39.. [gsymutil] Add `--statistics` option (#186495) # Motiviation Currently, if one wants to know the size of the sections in a gSYM (e.g. to check if they exceed 4GB), they have to dump the whole gSYM in the text form, then process that huge text to get the sizes. # New option `--statistics[=<format>]` This patch adds a `llvm-gsymutil --statistics[=<format>]` option to print the size info for all sections. It supports three formats: * `text`: Default. * `json`: Dense JSON. * `pretty-json`: Pretty-printed JSON. See example output below. # Examples ``` royshi-mac-office ~/tmp % guuu v2.gsym --statistics GSYM statistics for "v2.gsym": UUID: 4C4C446A-5555-3144-A1CF-AEBBCCD48E61 Number of addresses: 6,382 File size: 3,095,960 bytes Header: 20 bytes ( 0.00%) Global data dir: 140 bytes ( 0.00%) UUID section: 16 bytes ( 0.00%) Address table: 25,528 bytes ( 0.82%) Addr info offsets: 51,056 bytes ( 1.65%) File table: 3,652 bytes ( 0.12%) String table: 1,772,169 bytes (57.24%) Function info data: 1,243,376 bytes (40.16%) Size and name: 76,584 bytes ( 2.47%) Line table info: 145,260 bytes ( 4.69%) Inline info: 58,540 bytes ( 1.89%) Call site info: 25,902 bytes ( 0.84%) End of list: 51,056 bytes ( 1.65%) Padding: 5,387 bytes ( 0.17%) Merged func info: 880,647 bytes (28.45%) InfoType/InfoLength/Count/FnSize: 102,900 bytes ( 3.32%) Size and name: 209,160 bytes ( 6.76%) Line table info: 424,847 bytes (13.72%) Inline info: 2,058 bytes ( 0.07%) Call site info: 2,242 bytes ( 0.07%) Merged func info: 0 bytes ( 0.00%) End of list: 139,440 bytes ( 4.50%) Padding: 3 bytes ( 0.00%) royshi-mac-office ~/tmp % guuu v2.gsym --statistics=pretty-json { "byte-sizes": { "addr_info_offsets": 51056, "address_table": 25528, "file_size": 3095960, "file_table": 3652, "function_info_data": 1243376, "function_info_type_sizes": { "call_site_info": 25902, "end_of_list": 51056, "inline_info": 58540, "line_table_info": 145260, "merged_func_info": 880647, "merged_func_info_type_sizes": { "call_site_info": 2242, "end_of_list": 139440, "infotype_infolength_count_and_fnsize": 102900, "inline_info": 2058, "line_table_info": 424847, "merged_func_info": 0, "size_and_name": 209160 }, "padding": 5387, "size_and_name": 76584 }, "global_data_directory": 140, "header": 20, "padding": 3, "string_table": 1772169, "uuid_section": 16 }, "num_addresses": 6382, "path": "v2.gsym", "uuid": "4C4C446A-5555-3144-A1CF-AEBBCCD48E61" } ``` https://invent.kde.org/qt/clang/llvm-project/-/commit/668134e8acf10218663a0c33835bd4157ba358c4 Git commit a43296488ed34006f3201a258e712ae01fe63214 by GitHub (on behalf of Dmitry Sidorov) on 07/08/2026 at 00:51.. [AMDGPU] Fix sign of zero in fpround(fmul) -> V_{MAD,FMA}_MIX{LO,HI} (#214544) The isel patterns lowering `fptrunc (fmul float %a, %b)` to a mix instruction passed +0.0 as the FMA addend. Under round-to-nearest fma(a, b, +0.0) is +0.0 whenever a * b is -0.0, so the sign of zero was lost: on gfx90a, `(half)(-1.0f * 0.0f)` returned +0.0. Use a -0.0 addend instead, which is the correct multiplicative identity for an FMA and is what the f32 sibling pattern in MadFmaMixFP32Pats has always done. Verified on gfx90a: (half)(-1.0f * 0.0f) now returns 0x8000. https://invent.kde.org/qt/clang/llvm-project/-/commit/a43296488ed34006f3201a258e712ae01fe63214 Git commit 5be66d0a9afe1268bf7ff75c69a32b141d4f0096 by GitHub (on behalf of Dmitry Sidorov) on 07/08/2026 at 00:52.. [NFC][AMDGPU] Let IR level callers query the FMA/FMAD predicates (#213310) isFMADLegal and isFMAFasterThanFMulAndFAdd read the denormal mode out of the MachineFunction, so nothing before instruction selection can ask them whether an fmul/fadd pair will be fused. Take an explicit DenormalFPEnv instead, and make the existing MachineFunction / SelectionDAG / MachineInstr entry points thin wrappers over it. Also override the IR level isFMAFasterThanFMulAndFAdd hook. The two views agree by construction, since SIModeRegisterDefaults copies its denormal fields out of getDenormalFPEnv. isFMADLegal uses VT as written and does not look through vectors, so a vector type reports false, as in the SelectionDAG overload it was extracted from. The patch is preparation for querying these from getArithmeticInstrCost and a revived isProfitableToSinkOperands. Contributes to #211092 Assisted-By: Claude Opus 5 https://invent.kde.org/qt/clang/llvm-project/-/commit/5be66d0a9afe1268bf7ff75c69a32b141d4f0096 Git commit 1c0eda0d2371a6a755f90299892a7b89dc917442 by GitHub (on behalf of Mingjie Xu) on 07/08/2026 at 01:15.. Revert "[SCEV] Speed up forgetLoop by avoiding def-use walk for loop-header PHIs" (#212485) Reverts https://github.com/llvm/llvm-project/pull/201572 Multiple miscompilations are reported, see https://github.com/llvm/llvm-project/issues/207744, https://github.com/llvm/llvm-project/issues/212027 That commit made forgetLoop() rely on LoopUsers[L] and stop walking the def-use chain of the loop-header PHIs. This is insufficient, because some cached data is derived from the underlying IR of SCEVUnknown, it is not reachable from LoopUsers[L]. After that commit, forgetLoop() no longer invalidated them, so stale UnsignedRanges / SignedRanges, ConstantMultipleCache, ValuesAtScopes cause miscompilations. https://invent.kde.org/qt/clang/llvm-project/-/commit/1c0eda0d2371a6a755f90299892a7b89dc917442 Git commit 1b8dcb4f42f7ce005a223259e0453440d7eed00f by GitHub (on behalf of Alex MacLean) on 07/08/2026 at 01:25.. [NVPTX] Model SM architectures as subtarget features (NFC) (#214335) https://invent.kde.org/qt/clang/llvm-project/-/commit/1b8dcb4f42f7ce005a223259e0453440d7eed00f Git commit 56a654b9a9cffd32318d7ca5c6ee997827c07ecf by GitHub (on behalf of Shoreshen) on 07/08/2026 at 01:33.. [DAG] Change `isExtractSubvectorCheap` into `getExtractSubvectorCost` (#213614) This changes `isExtractSubvectorCheap` into `getExtractSubvectorCost`. This is preparing for #201056 in order to remove `isNarrowingProfitable` bail out for `narrowInsertExtractVectorBinOp`. The reason is `isNarrowingProfitable` should be applying on scalar variable instead of vectors. --------- Co-authored-by: shore <[email protected]> https://invent.kde.org/qt/clang/llvm-project/-/commit/56a654b9a9cffd32318d7ca5c6ee997827c07ecf Git commit c6eb5e390833295393e4d96c64adc67c4e3729b8 by GitHub (on behalf of Reid Kleckner) on 07/08/2026 at 01:54.. [docs][clang-format] Migrate generated clang-format docs to markdown (#211398) Tracking issue: #201242 See the [migration guide] for more information. This is a stacked PR based on #211397 , which will be a standalone commit that renames *.rst -> *.md before this PR lands for history preservation purposes. [migration guide]: https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines First, the generator was updated to generate markdown constructs, and then the Doxygen comments in `Format.h` and `IncludeStyle.h` were also modified to use markdown constructs. Mostly this means using single backticks instead of double backticks, which is the Doxygen-native way of expressing code font blocks anyway, so that's good. To validate, I built the Sphinx docs and the doxygen, and I confirmed that the generator script is idempotent, meaning it doesn't change the markdown output. When I add a new option to clang-format, it shows up in the help text block, so it works. https://invent.kde.org/qt/clang/llvm-project/-/commit/c6eb5e390833295393e4d96c64adc67c4e3729b8 Git commit 8307b46d3ad5ace00c21e1fec6ef4ef4284290e9 by GitHub (on behalf of Fabian Parzefall) on 07/08/2026 at 02:02.. [BOLT] Support runtime libraries built as thin archives (#214292) In some configurations, BOLT runtime libraries may be built as thin archive. Use the more generic `Archive::create` to handle these. https://invent.kde.org/qt/clang/llvm-project/-/commit/8307b46d3ad5ace00c21e1fec6ef4ef4284290e9 Git commit 1bfd9391b208400ff72782712f0fd2e054dd95ec by GitHub (on behalf of hev) on 07/08/2026 at 02:16.. [LoongArch][NFC] Add tests for vector extraction with zero extension (#214119) https://invent.kde.org/qt/clang/llvm-project/-/commit/1bfd9391b208400ff72782712f0fd2e054dd95ec Git commit 5ab9b3ebbfcf6b49f183d0b3e029e5fd53a9a7af by GitHub (on behalf of Sameer Sahasrabuddhe) on 07/08/2026 at 02:29.. [Docs][AMDGPU] fully specify volatile accesses in the memory model (#214168) A non-atomic volatile access on AMDGPU includes store-available or load-visible semantics at the widest scope supported by its address space: - system scope for global/generic, - workgroup scope for local (LDS) An atomic volatile access has the same availability and visibility as its atomic non-volatile variant. Previous Reference: 2f499b9 This fully specifies the behavior that the LLVM memory model leaves target-dependent, matching the implementation in SIMemoryLegalizer. Assisted-By: Claude Opus 4.8 https://invent.kde.org/qt/clang/llvm-project/-/commit/5ab9b3ebbfcf6b49f183d0b3e029e5fd53a9a7af Git commit ceaff22ed2c3ceb84da3e9334f511bc3f5b757cd by GitHub (on behalf of Shivam Gupta) on 07/08/2026 at 02:51.. [Clang][CodeGen] Respect FP pragma options for fneg and calls (#212141) Apply expression-specific floating-point options when emitting fneg and call instructions. This prevents these instructions from retaining fast-math flags disabled by local FP pragmas, such as #pragma clang fp reassociate(off). Fixes #51905 https://invent.kde.org/qt/clang/llvm-project/-/commit/ceaff22ed2c3ceb84da3e9334f511bc3f5b757cd Git commit 8d19df3660bb51b87b4b4baa79356f9688c58771 by GitHub (on behalf of tudinhh) on 07/08/2026 at 03:21.. [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (#183158) Fixes #182047 **Issue:** Compiling floating-point vector selects (e.g., `<2 x float>`) on RISC-V targets that only support integer vectors (like `zve32x`) causes a compiler crash in the Loop Vectorizer (`emitInvalidCostRemarks` unhandled `TypeSwitch`). **Root Cause:** The Type Legalizer correctly scalarizes the unsupported FP vector into `f32` operations. However, `RISCVTTIImpl::getCmpSelInstrCost` attempted to cost `Instruction::Select` natively without verifying floating-point vector hardware support. It passed the scalarized type to `getRISCVInstructionCost` to price a native vector merge instruction, which returned `InstructionCost::getInvalid()`. **Fix:** Added hardware support checks (`hasVInstructionsF16/32/64()`) for floating-point types in the `Instruction::Select` block. If the target lacks the required instructions, it falls back to `BaseT::getCmpSelInstrCost` to correctly calculate the sequential scalarized cost, allowing the vectorizer to safely bail out. **Testing:** * Added `llvm/test/Analysis/CostModel/RISCV/select-fp-zve32x.ll` * Verified expected scalarized costs using `update_analyze_test_checks.py` Co-authored-by: Luke Lau <[email protected]> https://invent.kde.org/qt/clang/llvm-project/-/commit/8d19df3660bb51b87b4b4baa79356f9688c58771 Git commit f2bfcf5dc1f650a35ea3f9bf17de0500301f0abf by GitHub (on behalf of hev) on 07/08/2026 at 03:43.. [LoongArch] Use unsigned vector extract for zero extension (#214120) Add patterns to select VPICKVE2GR_BU/HU and [X]VPICKVE2GR_WU for vector extraction followed by zero extension, eliminating redundant masking instructions. https://invent.kde.org/qt/clang/llvm-project/-/commit/f2bfcf5dc1f650a35ea3f9bf17de0500301f0abf Git commit b6eb594ad0186dfb349c2903b899606c21c6b348 by GitHub (on behalf of Carl Ritson) on 07/08/2026 at 03:58.. [AMDGPU] Reschedule loads in clauses to improve throughput (#102595) After clauses are formed their internal loads can be reordered to facilitate some additional opportunities for overlapping computation. This late stage rescheduling causes no change in register pressure. https://invent.kde.org/qt/clang/llvm-project/-/commit/b6eb594ad0186dfb349c2903b899606c21c6b348 Git commit a42f703a4d5f0777b85c29fea27cba55fa4e05f9 by GitHub (on behalf of Alan Li) on 07/08/2026 at 04:05.. [GlobalISel][AMDGPU] Expand `isKnownNeverZero` for vector instructions (#211149) A followup PR about adding some vector instruction patterns to `isKnownNeverZero`, which firstly added in https://github.com/llvm/llvm-project/pull/198438 The following instructions are added: * `G_BUILD_VECTOR` * `G_EXTRACT_VECTOR_ELT` * `G_SHUFFLE_VECTOR` https://invent.kde.org/qt/clang/llvm-project/-/commit/a42f703a4d5f0777b85c29fea27cba55fa4e05f9 Git commit eaf20bfb75c7601029ec160fd0a4a53b6b7d1e46 by GitHub (on behalf of Yaxun (Sam) Liu) on 07/08/2026 at 04:15.. [HIP] Remove device compilation from include path test (#214612) The libhipcxx test checks the include paths produced by the driver. It also ran a HIP device compilation, which requires the AMDGPU target and fails in builds that do not enable it. Remove the compilation and keep the driver command checks enabled in all builds. Buildbot failure: https://lab.llvm.org/buildbot/#/builders/225/builds/14729 https://invent.kde.org/qt/clang/llvm-project/-/commit/eaf20bfb75c7601029ec160fd0a4a53b6b7d1e46 Git commit fa01521e37e1b2db4edbf6a41687a00153505a37 by GitHub (on behalf of Lin Wang) on 07/08/2026 at 04:16.. [RISCV] Add scheduler definitions for XiangShan-KunMingHu (#148581) This patch adds an initial scheduler model for the XiangShan KunMingHu microarchitecture in the RISC-V backend, covering scalar instructions only. Support for vector instructions is not included in this patch. The model includes initial ProcResource definitions and WriteRes mappings for scalar instructions, derived from the publicly available XiangShan KunMingHu documentations: * [XiangShan Docs](https://docs.xiangshan.cc/projects/design/en/latest/). * [XiangShan User Guide](https://docs.xiangshan.cc/projects/user-guide/en/latest/). * [XiangShan KunMingHu RTL](https://github.com/OpenXiangShan/XiangShan). Simulator-based validation results will be provided in a follow-up update. Measurement results from real hardware will also be added afterwards to further validate and refine the model if necessary. This implementation was contributed by the [XSCC Team](https://github.com/orgs/OpenXiangShan/teams/xscc). --------- Co-authored-by: Chyaka <[email protected]> Co-authored-by: Bhe6669 <[email protected]> Co-authored-by: Tang Haojin <[email protected]> Co-authored-by: buggfg <[email protected]> https://invent.kde.org/qt/clang/llvm-project/-/commit/fa01521e37e1b2db4edbf6a41687a00153505a37 Git commit e6566492c03c164f4cc4a0775a864c8d59d3f941 by GitHub (on behalf of Baranov Victor) on 07/08/2026 at 05:04.. [clang-tidy][NFC] Apply llvm-redundant-casting check (#214024) https://invent.kde.org/qt/clang/llvm-project/-/commit/e6566492c03c164f4cc4a0775a864c8d59d3f941