Re: [stack] Concatenative Hardware

On 11/1/07, Daniel Ehrenberg <[email protected]> wrote:
> This is pretty high-level for an instruction set, don't you think?

Well part of the fun of designing hardware is you get to do what you want. :-)
It is very high-level, which is what I want to experiment with.

> Would it be that easy to implement QTE, COMP or DIP?

I don't know. A cons cell implementation wouldn't be too bad, but I
fear the performance might be horrendous.

> How would
> quotations be represented?

This is an open question, I'm fishing for ideas. Some possibilities
that I am aware of:
- cons cells
- linked arrays
- vlists

> This looks like just a small vocabulary for
> a concatenative langauge, or I'm missing something.

That's one way of looking at it. It is also similar to the language
minimal instruction set computers (e.g.
http://www.cs.uiowa.edu/~jones/arch/cisc/), except for higher-order
instructions.

It appears that higher-order instructions can allow for significantly
more compact code than is possible with traditional stack-oriented
architectures, which is an area of research I am interested in
pursuing.

Anyway, I'd like to hear suggestions on how to implement quotations in
hardware, or ways to improve the effectiveness of the instruction set
while maintaining higher-order instructions.

I'm open to the idea of 1 or even 2 operand instruction sets as well.

Cheers,
Christopher