Re: [stack] Concatenative Hardware

William Tanksley, Jr <[email protected]> wrote:
> You might want to look at Henry Baker's papers on a similar topic.
> Check out his paper on O(1) instructions which could implement a VERY
> flexible VM that doesn't require GC;
> http://home.pipeline.com/~hbaker1/LinearLisp.html. "Hash cons"ing is
> very important, and might even fit into hardware.

While re-reading this, I was thinking how this might not only fit into
hardware, it might even allow multiple parallel processors on the same
chip talking to external memory. Whoops, looks like Baker beat me to
it! See his section titled "Implications for Real Multiprocessors".

If you also want to handle arrays in such an architecture, you might
have to explore his suggestion in
http://home.pipeline.com/~hbaker1/ShallowArrays.html. That might have
the nice side effect of giving you machine-addressable code (the most
common architecture right now).

This looks like a really interesting processor arch.

-Billy