Re: [stack] Concatenative Hardware Redux (Another 16 Instruction Set)

On Jan 11, 2008 9:57 AM, William Tanksley, Jr <[email protected]> wrote:
>
> Seriously, though, I do suspect that Chuck Moore has it right on this
> one...

Why?

> Use instruction slots in a larger word size, and allow some of
> the slots to encode alternate instructions. In the SeaForth, you have
> an 18-bit word size with 3 5-bit instructions plus a trailing 3-bit
> instruction... The trailing instruction is very useful for the uLOOP
> instruction, which can only go there and which performs a 'decrement
> and loop if not zero' without a destination (which means it'll repeat
> the preceding words in the instruction).

Sure but that is just one instruction. Overall, having 16
instructions, means a much smaller chip with very very small power
overhead. I'm not an expert in the domain of course, but I would like
to know more about the trade-offs.

> You might want a trailing
> _and_ a preceding slot; the preceding slot could be for literals and
> targetted jumps (so that the instruction and the literal fit in the
> same instruction slot).

I don't understand what this means, and why.

> And so on.

Sorry that I don't fully understand.

- Christopher