Re: [stack] Concatenative Hardware Redux (Another 16 Instruction Set)

Christopher Diggins <[email protected]> wrote:
> Daniel Ehrenberg <[email protected]> wrote:
> > There's
> > no real point in restricting yourself to 16 operations, especially
> > when some of these operations will encode a literal and some of them
> > won't.

> I am looking at here the possibilities of implementing minimal
> hardware that is cheap, small, and has very little energy consumption.

A fascinating goal, and one which to my knowledge has not been
attempted together with a high-level instruction set.

> However, to be completely honest, the more I experiment with the
> instruction set, the more I think that I would prefer to work with a
> 255-instruction set (ala JVML).

Completely incompatible with the goal of minimal hardware -- and do
you actually have anything close to 256 opcodes? Can you imagine
building all the hardware to support each one and muxing/demuxing them
together? Wouldn't retreating to 5-bit instructions make more sense
initially?

> - Christopher

-Wm