[commit: stm] master: rearrange module header (35dd88c)
Simon Marlow <[email protected]>
| Newsgroups | gmane.comp.lang.haskell.cvs.libraries |
|---|---|
| Message-ID | <[email protected]> |
Repository : ssh://darcs.haskell.org//srv/darcs/packages/stm On branch : master http://hackage.haskell.org/trac/ghc/changeset/35dd88c8bec2c3a8c418cb873d01febd9eb788f3 >--------------------------------------------------------------- commit 35dd88c8bec2c3a8c418cb873d01febd9eb788f3 Author: Simon Marlow <[email protected]> Date: Mon Jul 2 12:51:01 2012 +0100 rearrange module header >--------------------------------------------------------------- Control/Concurrent/STM/TChan.hs | 10 +++++++--- 1 files changed, 7 insertions(+), 3 deletions(-) diff --git a/Control/Concurrent/STM/TChan.hs b/Control/Concurrent/STM/TChan.hs index eece85c..52af426 100644 --- a/Control/Concurrent/STM/TChan.hs +++ b/Control/Concurrent/STM/TChan.hs @@ -24,17 +24,21 @@ module Control.Concurrent.STM.TChan ( #ifdef __GLASGOW_HASKELL__ -- * TChans TChan, - newTChan, + + -- ** Construction + newTChan, newTChanIO, newBroadcastTChan, newBroadcastTChanIO, + dupTChan, + + -- ** Reading and writing readTChan, tryReadTChan, peekTChan, tryPeekTChan, writeTChan, - dupTChan, - unGetTChan, + unGetTChan, isEmptyTChan, cloneTChan #endif