Re: MLton broken FFI on AMD64???

On Fri, Feb 4, 2011 at 9:32 AM, Wesley W. Terpstra <[email protected]>wrote:

> However, the segfault persists. If you replace "printf" with "test":
> void test(const char* s, int x) {
>   printf(s, x);
> }
> ... it works.
>

I've confirmed that MLton produces identical code except replacing 'printf'
with 'test'. I tried a similar test with gcc. For some reason gcc clears eax
before a call to printf but not a call to 'printm'. Perhaps this is related
to varargs?

#include <stdio.h>
int printm(const char* x, int k);

int beh() {
printm("dog %d\n", 44);
printf("dog %d\n", 44);
return 1;
}

beh:
.LFB13:
        subq    $8, %rsp
.LCFI0:
        movl    $44, %esi
        movl    $.LC0, %edi
        call    printm
        movl    $44, %esi
        movl    $.LC0, %edi
        xorl    %eax, %eax      <<<<<<<<<<<<<<<< WTF?
        call    printf
        movl    $1, %eax
        addq    $8, %rsp
        ret

Adding an 'xorl %eax,%eax' directly before the call to printf in the MLton
generated assembler makes the problem disappear.

L_114:
        addq $0xFFFFFFFFFFFFFFD8,%rbp
        movq (c_stackP+0x0)(%rip),%rsp
        movl $0x7B,%r15d
        movl %r15d,%esi
        movq (globalObjptr+0x80)(%rip),%rdi
        addq $0x28,%rbp
        leaq (L_115+0x0)(%rip),%r15
        movq %r15,0xFFFFFFFFFFFFFFF8(%rbp)
        movq %rbp,(gcState+0x10)(%rip)
        movq %r12,(gcState+0x0)(%rip)
xorl %eax,%eax
        call printf
        movq (gcState+0x0)(%rip),%r12
        movq (gcState+0x10)(%rip),%rbp
        jmp L_115

I then did some digging and found this choice quote in the "System V
Application Binary Interface AMD64 Architecture Processor Supplement Draft
Version 0.99.5":
"    When a function taking variable-arguments is called, %rax must be set
to the
total number of floating point parameters passed to the function in vector
registers"

... either we need to add another tag to imports like:
_import "printf" stdarg : ... ;
... or we should just always set rax for every FFI call on AMD64?

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